1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (c) 2011 The Chromium OS Authors.
11 #define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
12 #define CONFIG_TRACE_EARLY_SIZE (16 << 20)
13 #define CONFIG_TRACE_EARLY
14 #define CONFIG_TRACE_EARLY_ADDR 0x00100000
17 #ifndef CONFIG_SPL_BUILD
18 #define CONFIG_IO_TRACE
22 #define CONFIG_SYS_TIMER_RATE 1000000
25 #define CONFIG_HOST_MAX_DEVICES 4
27 #define CONFIG_MALLOC_F_ADDR 0x0010000
29 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
31 /* turn on command-line edit/c/auto */
33 /* SPI - enable all SPI flash types for testing purposes */
35 #define CONFIG_I2C_EDID
37 #define CONFIG_SYS_FDT_LOAD_ADDR 0x100
39 #define CONFIG_PHYSMEM
41 /* Size of our emulated memory */
42 #define SB_CONCAT(x, y) x ## y
43 #define SB_TO_UL(s) SB_CONCAT(s, UL)
44 #define CONFIG_SYS_SDRAM_BASE 0
45 #define CONFIG_SYS_SDRAM_SIZE \
46 (SB_TO_UL(CONFIG_SANDBOX_RAM_SIZE_MB) << 20)
47 #define CONFIG_SYS_MONITOR_BASE 0
49 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
52 #define BOOT_TARGET_DEVICES(func) \
59 #include <config_distro_bootcmd.h>
62 #define CONFIG_KEEP_SERVERADDR
63 #define CONFIG_UDP_CHECKSUM
64 #define CONFIG_TIMESTAMP
65 #define CONFIG_BOOTP_SERVERIP
67 #ifndef SANDBOX_NO_SDL
68 #define CONFIG_SANDBOX_SDL
71 /* LCD and keyboard require SDL support */
72 #ifdef CONFIG_SANDBOX_SDL
73 #define LCD_BPP LCD_COLOR16
74 #define CONFIG_LCD_BMP_RLE8
76 #define CONFIG_KEYBOARD
78 #define SANDBOX_SERIAL_SETTINGS "stdin=serial,cros-ec-keyb,usbkbd\0" \
79 "stdout=serial,vidconsole\0" \
80 "stderr=serial,vidconsole\0"
82 #define SANDBOX_SERIAL_SETTINGS "stdin=serial\0" \
83 "stdout=serial,vidconsole\0" \
84 "stderr=serial,vidconsole\0"
87 #define SANDBOX_ETH_SETTINGS "ethaddr=00:00:11:22:33:44\0" \
88 "eth2addr=00:00:11:22:33:48\0" \
89 "eth3addr=00:00:11:22:33:45\0" \
90 "eth4addr=00:00:11:22:33:48\0" \
91 "eth5addr=00:00:11:22:33:46\0" \
92 "eth6addr=00:00:11:22:33:47\0" \
95 #define MEM_LAYOUT_ENV_SETTINGS \
96 "bootm_size=0x10000000\0" \
97 "kernel_addr_r=0x1000000\0" \
98 "fdt_addr_r=0xc00000\0" \
99 "ramdisk_addr_r=0x2000000\0" \
100 "scriptaddr=0x1000\0" \
101 "pxefile_addr_r=0x2000\0"
103 #define CONFIG_EXTRA_ENV_SETTINGS \
104 SANDBOX_SERIAL_SETTINGS \
105 SANDBOX_ETH_SETTINGS \
107 MEM_LAYOUT_ENV_SETTINGS
109 #ifndef CONFIG_SPL_BUILD
110 #define CONFIG_SYS_IDE_MAXBUS 1
111 #define CONFIG_SYS_ATA_IDE0_OFFSET 0
112 #define CONFIG_SYS_IDE_MAXDEVICE 2
113 #define CONFIG_SYS_ATA_BASE_ADDR 0x100
114 #define CONFIG_SYS_ATA_DATA_OFFSET 0
115 #define CONFIG_SYS_ATA_REG_OFFSET 1
116 #define CONFIG_SYS_ATA_ALT_OFFSET 2
117 #define CONFIG_SYS_ATA_STRIDE 4
120 #define CONFIG_SCSI_AHCI_PLAT
121 #define CONFIG_SYS_SCSI_MAX_DEVICE 2
122 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 8
123 #define CONFIG_SYS_SCSI_MAX_LUN 4
125 #define CONFIG_SYS_SATA_MAX_DEVICE 2