1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuration settings for the SAMA5D4EK board.
5 * Copyright (C) 2014 Atmel
6 * Bo Shen <voice.shen@atmel.com>
12 #include "at91-sama5_common.h"
15 #define CONFIG_NR_DRAM_BANKS 1
16 #define CONFIG_SYS_SDRAM_BASE 0x20000000
17 #define CONFIG_SYS_SDRAM_SIZE 0x20000000
19 #ifdef CONFIG_SPL_BUILD
20 #define CONFIG_SYS_INIT_SP_ADDR 0x218000
22 #define CONFIG_SYS_INIT_SP_ADDR \
23 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
26 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
29 #define CONFIG_SF_DEFAULT_SPEED 30000000
33 #ifdef CONFIG_CMD_NAND
34 #define CONFIG_NAND_ATMEL
35 #define CONFIG_SYS_MAX_NAND_DEVICE 1
36 #define CONFIG_SYS_NAND_BASE 0x80000000
38 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
40 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
41 #define CONFIG_SYS_NAND_ONFI_DETECTION
42 /* PMECC & PMERRLOC */
43 #define CONFIG_ATMEL_NAND_HWECC
44 #define CONFIG_ATMEL_NAND_HW_PMECC
48 #define CONFIG_SPL_TEXT_BASE 0x200000
49 #define CONFIG_SPL_MAX_SIZE 0x18000
50 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
51 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
52 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
53 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
55 #define CONFIG_SYS_MONITOR_LEN (512 << 10)
58 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
59 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
62 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000
64 #elif CONFIG_NAND_BOOT
65 #define CONFIG_SPL_NAND_DRIVERS
66 #define CONFIG_SPL_NAND_BASE
68 #define CONFIG_PMECC_CAP 8
69 #define CONFIG_PMECC_SECTOR_SIZE 512
70 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
71 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
72 #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
73 #define CONFIG_SYS_NAND_PAGE_COUNT 64
74 #define CONFIG_SYS_NAND_OOBSIZE 224
75 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000
76 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
77 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER