1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the SAMA5D3xEK board.
5 * Copyright (C) 2012 - 2013 Atmel
7 * based on at91sam9m10g45ek.h by:
8 * Stelian Pop <stelian@popies.net>
9 * Lead Tech Design <www.leadtechdesign.com>
15 #include "at91-sama5_common.h"
18 * This needs to be defined for the OHCI code to work but it is defined as
19 * ATMEL_ID_UHPHS in the CPU specific header files.
21 #define ATMEL_ID_UHP 32
24 * Specify the clock enable bit in the PMC_SCER register.
26 #define ATMEL_PMC_UHP (1 << 6)
29 #ifdef CONFIG_MTD_NOR_FLASH
30 #define CFG_SYS_FLASH_BASE 0x10000000
34 #define CFG_SYS_SDRAM_BASE 0x20000000
35 #define CFG_SYS_SDRAM_SIZE 0x20000000
40 #ifdef CONFIG_CMD_NAND
41 #define CFG_SYS_NAND_BASE 0x60000000
43 #define CFG_SYS_NAND_MASK_ALE (1 << 21)
45 #define CFG_SYS_NAND_MASK_CLE (1 << 22)