2 * Configuation settings for the SAMA5D3xEK board.
4 * Copyright (C) 2012 - 2013 Atmel
6 * based on at91sam9m10g45ek.h by:
7 * Stelian Pop <stelian@popies.net>
8 * Lead Tech Design <www.leadtechdesign.com>
10 * SPDX-License-Identifier: GPL-2.0+
16 #include <asm/hardware.h>
18 #define CONFIG_SYS_TEXT_BASE 0x26f00000
20 /* ARM asynchronous clock */
21 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
22 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
23 #define CONFIG_SYS_HZ 1000
25 #define CONFIG_AT91FAMILY
26 #define CONFIG_ARCH_CPU_INIT
28 #define CONFIG_SKIP_LOWLEVEL_INIT
29 #define CONFIG_BOARD_EARLY_INIT_F
30 #define CONFIG_DISPLAY_CPUINFO
32 #define CONFIG_CMD_BOOTZ
33 #define CONFIG_OF_LIBFDT /* Device Tree support */
35 /* general purpose I/O */
36 #define CONFIG_AT91_GPIO
39 #define CONFIG_ATMEL_USART
40 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
41 #define CONFIG_USART_ID ATMEL_ID_DBGU
44 * This needs to be defined for the OHCI code to work but it is defined as
45 * ATMEL_ID_UHPHS in the CPU specific header files.
47 #define ATMEL_ID_UHP ATMEL_ID_UHPHS
50 * Specify the clock enable bit in the PMC_SCER register.
52 #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
56 #define LCD_BPP LCD_COLOR16
57 #define LCD_OUTPUT_BPP 24
58 #define CONFIG_LCD_LOGO
59 #undef LCD_TEST_PATTERN
60 #define CONFIG_LCD_INFO
61 #define CONFIG_LCD_INFO_BELOW_LOGO
62 #define CONFIG_SYS_WHITE_ON_BLACK
63 #define CONFIG_ATMEL_HLCD
64 #define CONFIG_ATMEL_LCD_RGB565
65 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
67 /* board specific (not enough SRAM) */
68 #define CONFIG_SAMA5D3_LCD_BASE 0x23E00000
70 #define CONFIG_BOOTDELAY 3
75 #define CONFIG_BOOTP_BOOTFILESIZE
76 #define CONFIG_BOOTP_BOOTPATH
77 #define CONFIG_BOOTP_GATEWAY
78 #define CONFIG_BOOTP_HOSTNAME
81 #define CONFIG_SYS_NO_FLASH
84 * Command line configuration.
86 #include <config_cmd_default.h>
87 #undef CONFIG_CMD_FPGA
89 #undef CONFIG_CMD_LOADS
90 #define CONFIG_CMD_PING
91 #define CONFIG_CMD_DHCP
94 #define CONFIG_NR_DRAM_BANKS 1
95 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
96 #define CONFIG_SYS_SDRAM_SIZE 0x20000000
98 #define CONFIG_SYS_INIT_SP_ADDR \
99 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
102 #define CONFIG_CMD_SF
105 #define CONFIG_ATMEL_SPI
106 #define CONFIG_SPI_FLASH
107 #define CONFIG_SPI_FLASH_ATMEL
108 #define CONFIG_SF_DEFAULT_SPEED 30000000
112 #define CONFIG_CMD_NAND
114 #ifdef CONFIG_CMD_NAND
115 #define CONFIG_NAND_MAX_CHIPS 1
116 #define CONFIG_NAND_ATMEL
117 #define CONFIG_SYS_MAX_NAND_DEVICE 1
118 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
119 /* our ALE is AD21 */
120 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
121 /* our CLE is AD22 */
122 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
123 #define CONFIG_SYS_NAND_ONFI_DETECTION
124 /* PMECC & PMERRLOC */
125 #define CONFIG_ATMEL_NAND_HWECC
126 #define CONFIG_ATMEL_NAND_HW_PMECC
127 #define CONFIG_PMECC_CAP 4
128 #define CONFIG_PMECC_SECTOR_SIZE 512
129 #define CONFIG_CMD_NAND_TRIMFFS
132 /* Ethernet Hardware */
135 #define CONFIG_NET_MULTI
136 #define CONFIG_NET_RETRY_COUNT 20
137 #define CONFIG_MACB_SEARCH_PHY
139 #define CONFIG_CMD_MII
140 #define CONFIG_PHYLIB
141 #define CONFIG_PHY_MICREL
142 #define CONFIG_PHY_MICREL_KSZ9021
145 #define CONFIG_CMD_MMC
147 #ifdef CONFIG_CMD_MMC
149 #define CONFIG_GENERIC_MMC
150 #define CONFIG_GENERIC_ATMEL_MCI
151 #define ATMEL_BASE_MMCI ATMEL_BASE_MCI0
155 #define CONFIG_CMD_USB
157 #ifdef CONFIG_CMD_USB
158 #define CONFIG_USB_ATMEL
159 #define CONFIG_USB_OHCI_NEW
160 #define CONFIG_SYS_USB_OHCI_CPU_INIT
161 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
162 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3"
163 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
164 #define CONFIG_DOS_PARTITION
165 #define CONFIG_USB_STORAGE
168 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
169 #define CONFIG_CMD_FAT
172 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
174 #ifdef CONFIG_SYS_USE_SERIALFLASH
175 /* bootstrap + u-boot + env + linux in serial flash */
176 #define CONFIG_ENV_IS_IN_SPI_FLASH
177 #define CONFIG_ENV_OFFSET 0x5000
178 #define CONFIG_ENV_SIZE 0x3000
179 #define CONFIG_ENV_SECT_SIZE 0x1000
180 #define CONFIG_BOOTCOMMAND "sf probe 0; " \
181 "sf read 0x22000000 0x42000 0x300000; " \
183 #elif CONFIG_SYS_USE_NANDFLASH
184 /* bootstrap + u-boot + env in nandflash */
185 #define CONFIG_ENV_IS_IN_NAND
186 #define CONFIG_ENV_OFFSET 0xc0000
187 #define CONFIG_ENV_OFFSET_REDUND 0x100000
188 #define CONFIG_ENV_SIZE 0x20000
189 #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \
190 "nand read 0x22000000 0x200000 0x600000;" \
191 "bootm 0x22000000 - 0x21000000"
192 #elif CONFIG_SYS_USE_MMC
193 /* bootstrap + u-boot + env in sd card */
194 #define CONFIG_ENV_IS_IN_MMC
195 #define CONFIG_ENV_OFFSET 0x2000
196 #define CONFIG_ENV_SIZE 0x1000
197 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \
198 "fatload mmc 0:1 0x22000000 uImage; " \
199 "bootm 0x22000000 - 0x21000000"
200 #define CONFIG_SYS_MMC_ENV_DEV 0
202 #define CONIG_ENV_IS_NOWHERE
205 #ifdef CONFIG_SYS_USE_MMC
206 #define CONFIG_BOOTARGS \
207 "console=ttyS0,115200 earlyprintk " \
208 "root=/dev/mmcblk0p2 rw rootwait"
210 #define CONFIG_BOOTARGS \
211 "console=ttyS0,115200 earlyprintk " \
212 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
213 "256K(env),256k(evn_redundent),256k(spare)," \
214 "512k(dtb),6M(kernel)ro,-(rootfs) " \
215 "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
218 #define CONFIG_BAUDRATE 115200
220 #define CONFIG_SYS_PROMPT "U-Boot> "
221 #define CONFIG_SYS_CBSIZE 256
222 #define CONFIG_SYS_MAXARGS 16
223 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
224 sizeof(CONFIG_SYS_PROMPT) + 16)
225 #define CONFIG_SYS_LONGHELP
226 #define CONFIG_CMDLINE_EDITING
227 #define CONFIG_AUTO_COMPLETE
228 #define CONFIG_SYS_HUSH_PARSER
230 /* Size of malloc() pool */
231 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024)