1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the SAMA5D3xEK board.
5 * Copyright (C) 2012 - 2013 Atmel
7 * based on at91sam9m10g45ek.h by:
8 * Stelian Pop <stelian@popies.net>
9 * Lead Tech Design <www.leadtechdesign.com>
15 #include "at91-sama5_common.h"
18 * This needs to be defined for the OHCI code to work but it is defined as
19 * ATMEL_ID_UHPHS in the CPU specific header files.
21 #define ATMEL_ID_UHP 32
24 * Specify the clock enable bit in the PMC_SCER register.
26 #define ATMEL_PMC_UHP (1 << 6)
28 /* board specific (not enough SRAM) */
29 #define CONFIG_SAMA5D3_LCD_BASE 0x23E00000
32 #ifdef CONFIG_MTD_NOR_FLASH
33 #define CONFIG_SYS_FLASH_BASE 0x10000000
34 #define CONFIG_SYS_MAX_FLASH_SECT 131
38 #define CONFIG_SYS_SDRAM_BASE 0x20000000
39 #define CONFIG_SYS_SDRAM_SIZE 0x20000000
41 #ifdef CONFIG_SPL_BUILD
42 #define CONFIG_SYS_INIT_SP_ADDR 0x318000
44 #define CONFIG_SYS_INIT_SP_ADDR \
45 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
51 #ifdef CONFIG_CMD_NAND
52 #define CONFIG_SYS_MAX_NAND_DEVICE 1
53 #define CONFIG_SYS_NAND_BASE 0x60000000
55 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
57 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
62 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
63 #define CONFIG_USB_OHCI_NEW
64 #define CONFIG_SYS_USB_OHCI_CPU_INIT
65 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
66 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3"
67 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
71 #define CONFIG_SPL_MAX_SIZE 0x18000
72 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
73 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
74 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
75 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
77 #define CONFIG_SYS_MONITOR_LEN (512 << 10)
80 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"