2 * Configuration settings for the SAMA5D2 PTC Engineering board.
4 * Copyright (C) 2016 Atmel
5 * Wenyou Yang <wenyou.yang@atmel.com>
7 * SPDX-License-Identifier: GPL-2.0+
13 /* No NOR flash, this definition should put before common header */
14 #define CONFIG_SYS_NO_FLASH
16 #include "at91-sama5_common.h"
19 #define CONFIG_ATMEL_USART
20 #define CONFIG_USART_BASE ATMEL_BASE_UART0
21 #define CONFIG_USART_ID ATMEL_ID_UART0
23 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
24 #define CONFIG_SYS_SDRAM_SIZE 0x20000000
26 #ifdef CONFIG_SPL_BUILD
27 #define CONFIG_SYS_INIT_SP_ADDR 0x210000
29 #define CONFIG_SYS_INIT_SP_ADDR \
30 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
33 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
35 #undef CONFIG_AT91_GPIO
36 #define CONFIG_ATMEL_PIO4
39 #define CONFIG_NR_DRAM_BANKS 1
43 #define CONFIG_ATMEL_SPI
44 #define CONFIG_SPI_FLASH_ATMEL
45 #define CONFIG_SF_DEFAULT_BUS 0
46 #define CONFIG_SF_DEFAULT_CS 0
47 #define CONFIG_SF_DEFAULT_SPEED 30000000
51 #define CONFIG_CMD_NAND
53 #ifdef CONFIG_CMD_NAND
54 #define CONFIG_NAND_ATMEL
55 #define CONFIG_SYS_MAX_NAND_DEVICE 1
56 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
58 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
60 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
61 #define CONFIG_SYS_NAND_ONFI_DETECTION
62 /* PMECC & PMERRLOC */
63 #define CONFIG_ATMEL_NAND_HWECC
64 #define CONFIG_ATMEL_NAND_HW_PMECC
65 #define CONFIG_CMD_NAND_TRIMFFS
69 #define CONFIG_CMD_USB
72 #define CONFIG_USB_EHCI
73 #define CONFIG_USB_EHCI_ATMEL
74 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
78 #define CONFIG_USB_GADGET
79 #define CONFIG_USB_GADGET_DUALSPEED
80 #define CONFIG_USB_GADGET_ATMEL_USBA
81 #define CONFIG_USB_ETHER
82 #define CONFIG_USB_ETH_RNDIS
83 #define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D2_PTC"
85 #if defined(CONFIG_CMD_USB)
86 #define CONFIG_CMD_FAT
89 /* Ethernet Hardware */
92 #define CONFIG_NET_RETRY_COUNT 20
93 #define CONFIG_MACB_SEARCH_PHY
95 #ifdef CONFIG_SYS_USE_NANDFLASH
96 #undef CONFIG_ENV_OFFSET
97 #undef CONFIG_ENV_OFFSET_REDUND
98 #undef CONFIG_BOOTCOMMAND
99 /* u-boot env in nand flash */
100 #define CONFIG_ENV_IS_IN_NAND
101 #define CONFIG_ENV_OFFSET 0x200000
102 #define CONFIG_ENV_OFFSET_REDUND 0x400000
103 #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0xb80000 0x80000;" \
104 "nand read 0x22000000 0x600000 0x600000;" \
105 "bootz 0x22000000 - 0x21000000"
108 #undef CONFIG_BOOTARGS
109 #define CONFIG_BOOTARGS \
110 "console=ttyS0,57600 earlyprintk " \
111 "mtdparts=atmel_nand:6M(bootstrap)ro, 6M(kernel)ro,-(rootfs) " \
112 "rootfstype=ubifs ubi.mtd=2 root=ubi0:rootfs"
115 #define CONFIG_SPL_FRAMEWORK
116 #define CONFIG_SPL_TEXT_BASE 0x200000
117 #define CONFIG_SPL_MAX_SIZE 0x10000
118 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
119 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
120 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
121 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
123 #define CONFIG_SPL_BOARD_INIT
124 #define CONFIG_SYS_MONITOR_LEN (512 << 10)
126 #ifdef CONFIG_SYS_USE_SERIALFLASH
127 #define CONFIG_SPL_SPI_LOAD
128 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
130 #elif CONFIG_SYS_USE_NANDFLASH
131 #define CONFIG_SPL_NAND_DRIVERS
132 #define CONFIG_SPL_NAND_BASE
133 #define CONFIG_PMECC_CAP 8
134 #define CONFIG_PMECC_SECTOR_SIZE 512
135 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
136 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
137 #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
138 #define CONFIG_SYS_NAND_PAGE_COUNT 64
139 #define CONFIG_SYS_NAND_OOBSIZE 224
140 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000
141 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
142 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER