2 * Configuration settings for the SAMA5D2 PTC Engineering board.
4 * Copyright (C) 2016 Atmel
5 * Wenyou Yang <wenyou.yang@atmel.com>
7 * SPDX-License-Identifier: GPL-2.0+
13 #include "at91-sama5_common.h"
16 #define CONFIG_ATMEL_USART
17 #define CONFIG_USART_BASE ATMEL_BASE_UART0
18 #define CONFIG_USART_ID ATMEL_ID_UART0
20 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
21 #define CONFIG_SYS_SDRAM_SIZE 0x20000000
23 #ifdef CONFIG_SPL_BUILD
24 #define CONFIG_SYS_INIT_SP_ADDR 0x210000
26 #define CONFIG_SYS_INIT_SP_ADDR \
27 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
30 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
32 #undef CONFIG_AT91_GPIO
33 #define CONFIG_ATMEL_PIO4
36 #define CONFIG_NR_DRAM_BANKS 1
40 #define CONFIG_ATMEL_SPI
41 #define CONFIG_SPI_FLASH_ATMEL
42 #define CONFIG_SF_DEFAULT_BUS 0
43 #define CONFIG_SF_DEFAULT_CS 0
44 #define CONFIG_SF_DEFAULT_SPEED 30000000
48 #define CONFIG_CMD_NAND
50 #ifdef CONFIG_CMD_NAND
51 #define CONFIG_NAND_ATMEL
52 #define CONFIG_SYS_MAX_NAND_DEVICE 1
53 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
55 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
57 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
58 #define CONFIG_SYS_NAND_ONFI_DETECTION
59 /* PMECC & PMERRLOC */
60 #define CONFIG_ATMEL_NAND_HWECC
61 #define CONFIG_ATMEL_NAND_HW_PMECC
62 #define CONFIG_CMD_NAND_TRIMFFS
66 #define CONFIG_CMD_USB
69 #define CONFIG_USB_GADGET
70 #define CONFIG_USB_GADGET_DUALSPEED
71 #define CONFIG_USB_GADGET_ATMEL_USBA
72 #define CONFIG_USB_ETHER
73 #define CONFIG_USB_ETH_RNDIS
74 #define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D2_PTC"
76 /* Ethernet Hardware */
79 #define CONFIG_NET_RETRY_COUNT 20
80 #define CONFIG_MACB_SEARCH_PHY
82 #ifdef CONFIG_SYS_USE_NANDFLASH
83 #undef CONFIG_ENV_OFFSET
84 #undef CONFIG_ENV_OFFSET_REDUND
85 #undef CONFIG_BOOTCOMMAND
86 /* u-boot env in nand flash */
87 #define CONFIG_ENV_OFFSET 0x200000
88 #define CONFIG_ENV_OFFSET_REDUND 0x400000
89 #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0xb80000 0x80000;" \
90 "nand read 0x22000000 0x600000 0x600000;" \
91 "bootz 0x22000000 - 0x21000000"
94 #undef CONFIG_BOOTARGS
95 #define CONFIG_BOOTARGS \
96 "console=ttyS0,57600 earlyprintk " \
97 "mtdparts=atmel_nand:6M(bootstrap)ro, 6M(kernel)ro,-(rootfs) " \
98 "rootfstype=ubifs ubi.mtd=2 root=ubi0:rootfs"
101 #define CONFIG_SPL_FRAMEWORK
102 #define CONFIG_SPL_TEXT_BASE 0x200000
103 #define CONFIG_SPL_MAX_SIZE 0x10000
104 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
105 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
106 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
107 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
109 #define CONFIG_SYS_MONITOR_LEN (512 << 10)
111 #ifdef CONFIG_SYS_USE_SERIALFLASH
112 #define CONFIG_SPL_SPI_LOAD
113 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
115 #elif CONFIG_SYS_USE_NANDFLASH
116 #define CONFIG_SPL_NAND_DRIVERS
117 #define CONFIG_SPL_NAND_BASE
118 #define CONFIG_PMECC_CAP 8
119 #define CONFIG_PMECC_SECTOR_SIZE 512
120 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
121 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
122 #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
123 #define CONFIG_SYS_NAND_PAGE_COUNT 64
124 #define CONFIG_SYS_NAND_OOBSIZE 224
125 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000
126 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
127 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER