2 * Copyright (C) 2009 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Kyungmin Park <kyungmin.park@samsung.com>
6 * Configuation settings for the SAMSUNG Universal (s5pc100) board.
8 * SPDX-License-Identifier: GPL-2.0+
14 /* High Level Configuration Options */
15 #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
16 #define CONFIG_S5P 1 /* which is in a S5P Family */
17 #define CONFIG_S5PC110 1 /* which is in a S5PC110 */
18 #define CONFIG_MACH_GONI 1 /* working with Goni */
20 #include <asm/arch/cpu.h> /* get chip and board defs */
22 #define CONFIG_ARCH_CPU_INIT
23 #define CONFIG_DISPLAY_CPUINFO
24 #define CONFIG_DISPLAY_BOARDINFO
26 /* input clock of PLL: has 24MHz input clock at S5PC110 */
27 #define CONFIG_SYS_CLK_FREQ_C110 24000000
30 #define CONFIG_SYS_SDRAM_BASE 0x30000000
33 #define CONFIG_SYS_TEXT_BASE 0x34800000
35 #define CONFIG_SETUP_MEMORY_TAGS
36 #define CONFIG_CMDLINE_TAG
37 #define CONFIG_REVISION_TAG
38 #define CONFIG_INITRD_TAG
39 #define CONFIG_CMDLINE_EDITING
42 * Size of malloc() pool
43 * 1MB = 0x100000, 0x100000 = 1024 * 1024
45 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
47 * select serial console configuration
49 #define CONFIG_SERIAL2 1 /* use SERIAL2 */
50 #define CONFIG_BAUDRATE 115200
53 #define CONFIG_GENERIC_MMC
56 #define CONFIG_S5P_SDHCI
61 /* It should define before config_cmd_default.h */
62 #define CONFIG_SYS_NO_FLASH 1
64 /* Command definition */
65 #include <config_cmd_default.h>
67 #undef CONFIG_CMD_FPGA
68 #undef CONFIG_CMD_MISC
71 #undef CONFIG_CMD_XIMG
72 #define CONFIG_CMD_CACHE
73 #define CONFIG_CMD_REGINFO
74 #define CONFIG_CMD_ONENAND
75 #define CONFIG_CMD_MTDPARTS
76 #define CONFIG_CMD_MMC
78 #define CONFIG_BOOTDELAY 1
79 #define CONFIG_ZERO_BOOTDELAY_CHECK
81 #define CONFIG_MTD_DEVICE
82 #define CONFIG_MTD_PARTITIONS
84 /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
85 #define MTDIDS_DEFAULT "onenand0=samsung-onenand"
86 #define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:1m(bootloader)"\
96 #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
98 #define CONFIG_BOOTCOMMAND "run ubifsboot"
100 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
102 #define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext2" \
103 " ${console} ${meminfo}"
105 #define CONFIG_COMMON_BOOT "${console} ${meminfo} ${mtdparts}"
107 #define CONFIG_BOOTARGS "root=/dev/mtdblock8 ubi.mtd=8 ubi.mtd=3 ubi.mtd=6" \
108 " rootfstype=cramfs " CONFIG_COMMON_BOOT
110 #define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x100000;" \
111 " onenand write 0x32008000 0x0 0x100000\0"
113 #define CONFIG_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=3 ubi.mtd=6"
115 #define CONFIG_UBIFS_OPTION "rootflags=bulk_read,no_chk_data_crc"
117 #define CONFIG_MISC_COMMON
118 #define CONFIG_MISC_INIT_R
120 #define CONFIG_ENV_OVERWRITE
121 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
122 #define CONFIG_ENV_VARS_UBOOT_CONFIG
123 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
124 #define CONFIG_EXTRA_ENV_SETTINGS \
127 "onenand erase 0xc00000 0x600000;" \
128 "onenand write 0x31008000 0xc00000 0x600000\0" \
130 "onenand erase 0x01560000 0x1eaa0000;" \
131 "onenand write 0x32000000 0x1260000 0x8C0000\0" \
133 "onenand read 0x30007FC0 0xc00000 0x600000;" \
134 "bootm 0x30007FC0\0" \
136 "set bootargs root=/dev/mtdblock${bootblock} " \
137 "rootfstype=${rootfstype}" CONFIG_UBI_MTD " ${opts} " \
138 "${lcdinfo} " CONFIG_COMMON_BOOT "; run bootk\0" \
140 "set bootargs root=ubi0!rootfs rootfstype=ubifs " \
141 CONFIG_UBIFS_OPTION CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \
142 CONFIG_COMMON_BOOT "; run bootk\0" \
144 "set bootargs root=ubi0!rootfs rootfstype=ubifs " \
145 CONFIG_UBIFS_OPTION CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \
146 CONFIG_COMMON_BOOT "; tftp 0x30007FC0 uImage; " \
147 "bootm 0x30007FC0\0" \
149 "set bootargs " CONFIG_RAMDISK_BOOT \
150 " initrd=0x33000000,8M ramdisk=8192\0" \
152 "set bootargs root=${mmcblk} rootfstype=${rootfstype}" \
153 CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \
154 CONFIG_COMMON_BOOT "; run bootk\0" \
155 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
156 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
158 "rootfstype=cramfs\0" \
159 "console=" CONFIG_DEFAULT_CONSOLE \
160 "mtdparts=" MTDPARTS_DEFAULT \
161 "meminfo=mem=80M mem=256M@0x40000000 mem=128M@0x50000000\0" \
162 "mmcblk=/dev/mmcblk1p1\0" \
166 "opts=always_resume=1"
168 /* Miscellaneous configurable options */
169 #define CONFIG_SYS_LONGHELP /* undef to save memory */
170 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
171 #define CONFIG_SYS_PROMPT "Goni # "
172 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
173 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
174 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
175 /* Boot Argument Buffer Size */
176 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
177 /* memtest works on */
178 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
179 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
180 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4000000)
182 /* Goni has 3 banks of DRAM, but swap the bank */
183 #define CONFIG_NR_DRAM_BANKS 3
184 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */
185 #define PHYS_SDRAM_1_SIZE (80 << 20) /* 80 MB in Bank #0 */
186 #define PHYS_SDRAM_2 0x40000000 /* mDDR DMC1 Bank #1 */
187 #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in Bank #1 */
188 #define PHYS_SDRAM_3 0x50000000 /* mDDR DMC2 Bank #2 */
189 #define PHYS_SDRAM_3_SIZE (128 << 20) /* 128 MB in Bank #2 */
191 #define CONFIG_SYS_MONITOR_BASE 0x00000000
192 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */
194 /* FLASH and environment organization */
195 #define CONFIG_ENV_IS_IN_ONENAND 1
196 #define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB, 0x40000 */
197 #define CONFIG_ENV_ADDR (1 << 20) /* 1 MB, 0x100000 */
199 #define CONFIG_USE_ONENAND_BOARD_INIT
200 #define CONFIG_SAMSUNG_ONENAND 1
201 #define CONFIG_SYS_ONENAND_BASE 0xB0000000
203 #define CONFIG_DOS_PARTITION 1
205 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000)
207 #define CONFIG_SYS_CACHELINE_SIZE 64
210 #define CONFIG_POWER_I2C
211 #define CONFIG_POWER_MAX8998
213 #include <asm/arch/gpio.h>
217 #define CONFIG_SOFT_I2C_GPIO_SCL s5pc110_gpio_get(j4, 3)
218 #define CONFIG_SOFT_I2C_GPIO_SDA s5pc110_gpio_get(j4, 0)
220 #define CONFIG_SYS_I2C
221 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
222 #define CONFIG_SYS_I2C_SOFT_SPEED 50000
223 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
224 #define CONFIG_I2C_MULTI_BUS
225 #define CONFIG_SYS_MAX_I2C_BUS 7
226 #define CONFIG_USB_GADGET
227 #define CONFIG_USB_GADGET_S3C_UDC_OTG
228 #define CONFIG_USB_GADGET_DUALSPEED
230 #endif /* __CONFIG_H */