include/configs/s32v234evb.h

   1 /*
   2  * (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  *
   6  * Configuration settings for the Freescale S32V234 EVB board.
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #include <asm/arch/imx-regs.h>
  13
  14 #define CONFIG_S32V234
  15 #define CONFIG_DM
  16
  17 /* Config GIC */
  18 #define CONFIG_GICV2
  19 #define GICD_BASE 0x7D001000
  20 #define GICC_BASE 0x7D002000
  21
  22 #define CONFIG_REMAKE_ELF
  23 #undef CONFIG_RUN_FROM_IRAM_ONLY
  24
  25 #define CONFIG_RUN_FROM_DDR1
  26 #undef CONFIG_RUN_FROM_DDR0
  27
  28 /* Run by default from DDR1  */
  29 #ifdef CONFIG_RUN_FROM_DDR0
  30 #define DDR_BASE_ADDR           0x80000000
  31 #else
  32 #define DDR_BASE_ADDR           0xC0000000
  33 #endif
  34
  35 #define CONFIG_MACH_TYPE                4146
  36
  37 #define CONFIG_SKIP_LOWLEVEL_INIT
  38
  39 /* Config CACHE */
  40 #define CONFIG_CMD_CACHE
  41
  42 #define CONFIG_SYS_FULL_VA
  43
  44 /* Enable passing of ATAGs */
  45 #define CONFIG_CMDLINE_TAG
  46
  47 /* SMP Spin Table Definitions */
  48 #define CPU_RELEASE_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  49
  50 /* Generic Timer Definitions */
  51 #define COUNTER_FREQUENCY               (1000000000)    /* 1000MHz */
  52 #define CONFIG_SYS_FSL_ERRATUM_A008585
  53
  54 /* Size of malloc() pool */
  55 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
  56 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1 * 1024 * 1024)
  57 #else
  58 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
  59 #endif
  60
  61 #define CONFIG_DM_SERIAL
  62 #define CONFIG_FSL_LINFLEXUART
  63 #define LINFLEXUART_BASE                LINFLEXD0_BASE_ADDR
  64
  65 #define CONFIG_DEBUG_UART_LINFLEXUART
  66 #define CONFIG_DEBUG_UART_BASE          LINFLEXUART_BASE
  67
  68 /* Allow to overwrite serial and ethaddr */
  69 #define CONFIG_ENV_OVERWRITE
  70 #define CONFIG_SYS_UART_PORT            (1)
  71
  72 #define CONFIG_FSL_USDHC
  73 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC_BASE_ADDR
  74 #define CONFIG_SYS_FSL_ESDHC_NUM        1
  75
  76 #define CONFIG_CMD_MMC
  77 /* #define CONFIG_CMD_EXT2 EXT2 Support */
  78
  79 #if 0
  80
  81 /* Ethernet config */
  82 #define CONFIG_CMD_MII
  83 #define CONFIG_FEC_MXC
  84 #define CONFIG_MII
  85 #define IMX_FEC_BASE            ENET_BASE_ADDR
  86 #define CONFIG_FEC_XCV_TYPE     RMII
  87 #define CONFIG_FEC_MXC_PHYADDR  0
  88 #endif
  89
  90 #if 0                           /* Disable until the FLASH will be implemented */
  91 #define CONFIG_SYS_USE_NAND
  92 #endif
  93
  94 #ifdef CONFIG_SYS_USE_NAND
  95 /* Nand Flash Configs */
  96 #define CONFIG_JFFS2_NAND
  97 #define MTD_NAND_FSL_NFC_SWECC 1
  98 #define CONFIG_NAND_FSL_NFC
  99 #define CONFIG_SYS_NAND_BASE            0x400E0000
 100 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 101 #define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE
 102 #define CONFIG_SYS_NAND_SELECT_DEVICE
 103 #define CONFIG_SYS_64BIT_VSPRINTF       /* needed for nand_util.c */
 104 #endif
 105
 106 #define CONFIG_LOADADDR                 0xC307FFC0
 107
 108 #define CONFIG_EXTRA_ENV_SETTINGS \
 109         "boot_scripts=boot.scr.uimg boot.scr\0" \
 110         "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
 111         "console=ttyLF0,115200\0" \
 112         "fdt_file=s32v234-evb.dtb\0" \
 113         "fdt_high=0xffffffff\0" \
 114         "initrd_high=0xffffffff\0" \
 115         "fdt_addr_r=0xC2000000\0" \
 116         "kernel_addr_r=0xC307FFC0\0" \
 117         "ramdisk_addr_r=0xC4000000\0" \
 118         "ramdisk=rootfs.uimg\0"\
 119         "ip_dyn=yes\0" \
 120         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
 121         "update_sd_firmware_filename=u-boot.imx\0" \
 122         "update_sd_firmware=" \
 123                 "if test ${ip_dyn} = yes; then " \
 124                         "setenv get_cmd dhcp; " \
 125                 "else " \
 126                         "setenv get_cmd tftp; " \
 127                 "fi; " \
 128                 "if mmc dev ${mmcdev}; then "   \
 129                         "if ${get_cmd} ${update_sd_firmware_filename}; then " \
 130                                 "setexpr fw_sz ${filesize} / 0x200; " \
 131                                 "setexpr fw_sz ${fw_sz} + 1; "  \
 132                                 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
 133                         "fi; "  \
 134                 "fi\0" \
 135         "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
 136         "jtagboot=echo Booting using jtag...; " \
 137                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
 138         "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
 139                 "run loaduimage; run loadramdisk; run loadfdt;"\
 140                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
 141         "boot_net_usb_start=true\0" \
 142         BOOTENV
 143
 144 #define BOOT_TARGET_DEVICES(func) \
 145         func(MMC, mmc, 1) \
 146         func(MMC, mmc, 0) \
 147         func(DHCP, dhcp, na)
 148
 149 #define CONFIG_BOOTCOMMAND \
 150         "run distro_bootcmd"
 151
 152 #include <config_distro_bootcmd.h>
 153
 154 /* Miscellaneous configurable options */
 155 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 156 #define CONFIG_SYS_PROMPT               "=> "
 157
 158 #define CONFIG_SYS_MEMTEST_START        (DDR_BASE_ADDR)
 159 #define CONFIG_SYS_MEMTEST_END          (DDR_BASE_ADDR + 0x7C00000)
 160
 161 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 162 #define CONFIG_SYS_HZ                           1000
 163
 164 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
 165 #define CONFIG_SYS_MALLOC_BASE          (DDR_BASE_ADDR)
 166 #endif
 167
 168 #if 0
 169 /* Configure PXE */
 170 #define CONFIG_BOOTP_PXE_CLIENTARCH     0x100
 171 #endif
 172
 173 /* Physical memory map */
 174 /* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
 175 #define CONFIG_NR_DRAM_BANKS            1
 176 #define PHYS_SDRAM                      (DDR_BASE_ADDR)
 177 #define PHYS_SDRAM_SIZE                 (256 * 1024 * 1024)
 178
 179 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
 180 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 181 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 182
 183 #define CONFIG_SYS_INIT_SP_OFFSET \
 184         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 185 #define CONFIG_SYS_INIT_SP_ADDR \
 186         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 187
 188 /* environment organization */
 189 #define CONFIG_ENV_SIZE                 (8 * 1024)
 190
 191 #define CONFIG_ENV_OFFSET               (12 * 64 * 1024)
 192 #define CONFIG_SYS_MMC_ENV_DEV          0
 193
 194
 195 #define CONFIG_BOOTP_BOOTFILESIZE
 196
 197 #endif