Merge git://git.denx.de/u-boot-spi
[platform/kernel/u-boot.git] / include / configs / s32v234evb.h
1 /*
2  * (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  *
6  * Configuration settings for the Freescale S32V234 EVB board.
7  */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 #ifndef CONFIG_SPL_BUILD
13 #include <config_distro_defaults.h>
14 #endif
15
16 #include <asm/arch/imx-regs.h>
17
18 #define CONFIG_S32V234
19 #define CONFIG_DM
20
21 /* Config GIC */
22 #define CONFIG_GICV2
23 #define GICD_BASE 0x7D001000
24 #define GICC_BASE 0x7D002000
25
26 #define CONFIG_REMAKE_ELF
27 #undef CONFIG_RUN_FROM_IRAM_ONLY
28
29 #define CONFIG_RUN_FROM_DDR1
30 #undef CONFIG_RUN_FROM_DDR0
31
32 /* Run by default from DDR1  */
33 #ifdef CONFIG_RUN_FROM_DDR0
34 #define DDR_BASE_ADDR           0x80000000
35 #else
36 #define DDR_BASE_ADDR           0xC0000000
37 #endif
38
39 #define CONFIG_MACH_TYPE                4146
40
41 #define CONFIG_SKIP_LOWLEVEL_INIT
42
43 /* Config CACHE */
44 #define CONFIG_CMD_CACHE
45
46 #define CONFIG_SYS_FULL_VA
47
48 /* Enable passing of ATAGs */
49 #define CONFIG_CMDLINE_TAG
50
51 /* SMP Spin Table Definitions */
52 #define CPU_RELEASE_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
53
54 /* Generic Timer Definitions */
55 #define COUNTER_FREQUENCY               (1000000000)    /* 1000MHz */
56 #define CONFIG_SYS_FSL_ERRATUM_A008585
57
58 /* Size of malloc() pool */
59 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
60 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1 * 1024 * 1024)
61 #else
62 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
63 #endif
64
65 #define CONFIG_DM_SERIAL
66 #define CONFIG_FSL_LINFLEXUART
67 #define LINFLEXUART_BASE                LINFLEXD0_BASE_ADDR
68
69 #define CONFIG_DEBUG_UART_LINFLEXUART
70 #define CONFIG_DEBUG_UART_BASE          LINFLEXUART_BASE
71
72 /* Allow to overwrite serial and ethaddr */
73 #define CONFIG_ENV_OVERWRITE
74 #define CONFIG_SYS_UART_PORT            (1)
75
76 #define CONFIG_FSL_ESDHC
77 #define CONFIG_FSL_USDHC
78 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC_BASE_ADDR
79 #define CONFIG_SYS_FSL_ESDHC_NUM        1
80
81 #define CONFIG_CMD_MMC
82 /* #define CONFIG_CMD_EXT2 EXT2 Support */
83
84 #if 0
85
86 /* Ethernet config */
87 #define CONFIG_CMD_PING
88 #define CONFIG_CMD_MII
89 #define CONFIG_FEC_MXC
90 #define CONFIG_MII
91 #define IMX_FEC_BASE            ENET_BASE_ADDR
92 #define CONFIG_FEC_XCV_TYPE     RMII
93 #define CONFIG_FEC_MXC_PHYADDR  0
94 #endif
95
96 #if 0                           /* Disable until the FLASH will be implemented */
97 #define CONFIG_SYS_USE_NAND
98 #endif
99
100 #ifdef CONFIG_SYS_USE_NAND
101 /* Nand Flash Configs */
102 #define CONFIG_JFFS2_NAND
103 #define MTD_NAND_FSL_NFC_SWECC 1
104 #define CONFIG_NAND_FSL_NFC
105 #define CONFIG_SYS_NAND_BASE            0x400E0000
106 #define CONFIG_SYS_MAX_NAND_DEVICE      1
107 #define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE
108 #define CONFIG_SYS_NAND_SELECT_DEVICE
109 #define CONFIG_SYS_64BIT_VSPRINTF       /* needed for nand_util.c */
110 #endif
111
112 #define CONFIG_LOADADDR                 0xC307FFC0
113
114 #define CONFIG_EXTRA_ENV_SETTINGS \
115         "boot_scripts=boot.scr.uimg boot.scr\0" \
116         "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
117         "console=ttyLF0,115200\0" \
118         "fdt_file=s32v234-evb.dtb\0" \
119         "fdt_high=0xffffffff\0" \
120         "initrd_high=0xffffffff\0" \
121         "fdt_addr_r=0xC2000000\0" \
122         "kernel_addr_r=0xC307FFC0\0" \
123         "ramdisk_addr_r=0xC4000000\0" \
124         "ramdisk=rootfs.uimg\0"\
125         "ip_dyn=yes\0" \
126         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
127         "update_sd_firmware_filename=u-boot.imx\0" \
128         "update_sd_firmware=" \
129                 "if test ${ip_dyn} = yes; then " \
130                         "setenv get_cmd dhcp; " \
131                 "else " \
132                         "setenv get_cmd tftp; " \
133                 "fi; " \
134                 "if mmc dev ${mmcdev}; then "   \
135                         "if ${get_cmd} ${update_sd_firmware_filename}; then " \
136                                 "setexpr fw_sz ${filesize} / 0x200; " \
137                                 "setexpr fw_sz ${fw_sz} + 1; "  \
138                                 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
139                         "fi; "  \
140                 "fi\0" \
141         "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
142         "jtagboot=echo Booting using jtag...; " \
143                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
144         "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
145                 "run loaduimage; run loadramdisk; run loadfdt;"\
146                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
147         "boot_net_usb_start=true\0" \
148         BOOTENV
149
150 #define BOOT_TARGET_DEVICES(func) \
151         func(MMC, mmc, 1) \
152         func(MMC, mmc, 0) \
153         func(DHCP, dhcp, na)
154
155 #define CONFIG_BOOTCOMMAND \
156         "run distro_bootcmd"
157
158 #include <config_distro_bootcmd.h>
159
160 /* Miscellaneous configurable options */
161 #define CONFIG_SYS_LONGHELP     /* undef to save memory */
162 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
163 #define CONFIG_SYS_PROMPT               "=> "
164 #undef CONFIG_AUTO_COMPLETE
165 #define CONFIG_CMDLINE_EDITING
166
167 #define CONFIG_CMD_MEMTEST
168 #define CONFIG_SYS_MEMTEST_START        (DDR_BASE_ADDR)
169 #define CONFIG_SYS_MEMTEST_END          (DDR_BASE_ADDR + 0x7C00000)
170
171 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
172 #define CONFIG_SYS_HZ                           1000
173
174 #define CONFIG_SYS_TEXT_BASE            0x3E800000      /* SDRAM */
175
176 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
177 #define CONFIG_SYS_MALLOC_BASE          (DDR_BASE_ADDR)
178 #endif
179
180 #if 0
181 /* Configure PXE */
182 #define CONFIG_BOOTP_PXE
183 #define CONFIG_BOOTP_PXE_CLIENTARCH     0x100
184 #endif
185
186 /* Physical memory map */
187 /* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
188 #define CONFIG_NR_DRAM_BANKS            1
189 #define PHYS_SDRAM                      (DDR_BASE_ADDR)
190 #define PHYS_SDRAM_SIZE                 (256 * 1024 * 1024)
191
192 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
193 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
194 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
195
196 #define CONFIG_SYS_INIT_SP_OFFSET \
197         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
198 #define CONFIG_SYS_INIT_SP_ADDR \
199         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
200
201 /* environment organization */
202 #define CONFIG_ENV_SIZE                 (8 * 1024)
203
204 #define CONFIG_ENV_OFFSET               (12 * 64 * 1024)
205 #define CONFIG_SYS_MMC_ENV_DEV          0
206
207
208 #define CONFIG_BOOTP_BOOTFILESIZE
209 #define CONFIG_BOOTP_BOOTPATH
210 #define CONFIG_BOOTP_GATEWAY
211 #define CONFIG_BOOTP_HOSTNAME
212
213 #endif