1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
5 * Configuration settings for the Freescale S32V234 EVB board.
11 #include <asm/arch/imx-regs.h>
13 #define CONFIG_S32V234
17 #define GICD_BASE 0x7D001000
18 #define GICC_BASE 0x7D002000
20 #define CONFIG_REMAKE_ELF
21 #undef CONFIG_RUN_FROM_IRAM_ONLY
23 #define CONFIG_RUN_FROM_DDR1
24 #undef CONFIG_RUN_FROM_DDR0
26 /* Run by default from DDR1 */
27 #ifdef CONFIG_RUN_FROM_DDR0
28 #define DDR_BASE_ADDR 0x80000000
30 #define DDR_BASE_ADDR 0xC0000000
33 #define CONFIG_MACH_TYPE 4146
35 #define CONFIG_SKIP_LOWLEVEL_INIT
38 #define CONFIG_CMD_CACHE
40 #define CONFIG_SYS_FULL_VA
42 /* Enable passing of ATAGs */
43 #define CONFIG_CMDLINE_TAG
45 /* SMP Spin Table Definitions */
46 #define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
48 /* Generic Timer Definitions */
49 #define COUNTER_FREQUENCY (1000000000) /* 1000MHz */
50 #define CONFIG_SYS_FSL_ERRATUM_A008585
52 /* Size of malloc() pool */
53 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
54 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1 * 1024 * 1024)
56 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
59 #define LINFLEXUART_BASE LINFLEXD0_BASE_ADDR
61 #define CONFIG_DEBUG_UART_LINFLEXUART
62 #define CONFIG_DEBUG_UART_BASE LINFLEXUART_BASE
64 /* Allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
66 #define CONFIG_SYS_UART_PORT (1)
68 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC_BASE_ADDR
69 #define CONFIG_SYS_FSL_ESDHC_NUM 1
71 /* #define CONFIG_CMD_EXT2 EXT2 Support */
76 #define CONFIG_CMD_MII
77 #define CONFIG_FEC_MXC
78 #define IMX_FEC_BASE ENET_BASE_ADDR
79 #define CONFIG_FEC_XCV_TYPE RMII
80 #define CONFIG_FEC_MXC_PHYADDR 0
83 #if 0 /* Disable until the FLASH will be implemented */
84 #define CONFIG_SYS_USE_NAND
87 #ifdef CONFIG_SYS_USE_NAND
88 /* Nand Flash Configs */
89 #define CONFIG_JFFS2_NAND
90 #define MTD_NAND_FSL_NFC_SWECC 1
91 #define CONFIG_NAND_FSL_NFC
92 #define CONFIG_SYS_NAND_BASE 0x400E0000
93 #define CONFIG_SYS_MAX_NAND_DEVICE 1
94 #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
95 #define CONFIG_SYS_NAND_SELECT_DEVICE
96 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
99 #define CONFIG_LOADADDR 0xC307FFC0
101 #define CONFIG_EXTRA_ENV_SETTINGS \
102 "boot_scripts=boot.scr.uimg boot.scr\0" \
103 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
104 "console=ttyLF0,115200\0" \
105 "fdt_file=s32v234-evb.dtb\0" \
106 "fdt_high=0xffffffff\0" \
107 "initrd_high=0xffffffff\0" \
108 "fdt_addr_r=0xC2000000\0" \
109 "kernel_addr_r=0xC307FFC0\0" \
110 "ramdisk_addr_r=0xC4000000\0" \
111 "ramdisk=rootfs.uimg\0"\
113 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
114 "update_sd_firmware_filename=u-boot.imx\0" \
115 "update_sd_firmware=" \
116 "if test ${ip_dyn} = yes; then " \
117 "setenv get_cmd dhcp; " \
119 "setenv get_cmd tftp; " \
121 "if mmc dev ${mmcdev}; then " \
122 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
123 "setexpr fw_sz ${filesize} / 0x200; " \
124 "setexpr fw_sz ${fw_sz} + 1; " \
125 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
128 "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
129 "jtagboot=echo Booting using jtag...; " \
130 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
131 "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
132 "run loaduimage; run loadramdisk; run loadfdt;"\
133 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
134 "boot_net_usb_start=true\0" \
137 #define BOOT_TARGET_DEVICES(func) \
142 #define CONFIG_BOOTCOMMAND \
145 #include <config_distro_bootcmd.h>
146 #include <linux/stringify.h>
148 /* Miscellaneous configurable options */
149 #define CONFIG_SYS_PROMPT "=> "
151 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
152 #define CONFIG_SYS_HZ 1000
154 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
155 #define CONFIG_SYS_MALLOC_BASE (DDR_BASE_ADDR)
160 #define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
163 /* Physical memory map */
164 /* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
165 #define PHYS_SDRAM (DDR_BASE_ADDR)
166 #define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
168 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
169 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
170 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
172 #define CONFIG_SYS_INIT_SP_OFFSET \
173 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
174 #define CONFIG_SYS_INIT_SP_ADDR \
175 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
177 /* environment organization */
179 #define CONFIG_SYS_MMC_ENV_DEV 0
182 #define CONFIG_BOOTP_BOOTFILESIZE