1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
5 #ifndef __CONFIG_RV1108_COMMON_H
6 #define __CONFIG_RV1108_COMMON_H
8 #include <asm/arch-rockchip/hardware.h>
9 #include "rockchip-common.h"
11 #define CFG_IRAM_BASE 0x10080000
13 #define CFG_SYS_TIMER_RATE (24 * 1000 * 1000)
14 /* TIMER1,initialized by ddr initialize code */
15 #define CFG_SYS_TIMER_BASE 0x10350020
16 #define CFG_SYS_TIMER_COUNTER (CFG_SYS_TIMER_BASE + 8)
18 #define CFG_SYS_SDRAM_BASE 0x60000000
20 #define ENV_MEM_LAYOUT_SETTINGS \
21 "scriptaddr=0x60000000\0" \
22 "fdt_addr_r=0x61f00000\0" \
23 "kernel_addr_r=0x62000000\0" \
24 "ramdisk_addr_r=0x64000000\0"
26 #include <config_distro_bootcmd.h>
27 #define CFG_EXTRA_ENV_SETTINGS \
28 ENV_MEM_LAYOUT_SETTINGS \
29 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
30 "partitions=" PARTS_DEFAULT \