1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
5 #ifndef __CONFIG_RV1108_COMMON_H
6 #define __CONFIG_RV1108_COMMON_H
8 #include <asm/arch-rockchip/hardware.h>
9 #include "rockchip-common.h"
11 #define CONFIG_IRAM_BASE 0x10080000
13 #define CONFIG_SYS_CBSIZE 1024
14 #define CONFIG_SKIP_LOWLEVEL_INIT
16 #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
17 /* TIMER1,initialized by ddr initialize code */
18 #define CONFIG_SYS_TIMER_BASE 0x10350020
19 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
21 #define CONFIG_SYS_SDRAM_BASE 0x60000000
22 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000)
23 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x2000000)
25 /* rockchip ohci host driver */
26 #define CONFIG_USB_OHCI_NEW
27 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
30 #ifndef CONFIG_SPL_BUILD
31 #define ENV_MEM_LAYOUT_SETTINGS \
32 "scriptaddr=0x60000000\0" \
33 "fdt_addr_r=0x61f00000\0" \
34 "kernel_addr_r=0x62000000\0" \
35 "ramdisk_addr_r=0x64000000\0"
37 #include <config_distro_bootcmd.h>
38 #define CONFIG_EXTRA_ENV_SETTINGS \
39 ENV_MEM_LAYOUT_SETTINGS \
40 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
41 "partitions=" PARTS_DEFAULT \