2 * Configuation settings for the Renesas Technology RSK 7203
4 * Copyright (C) 2008 Nobuhiro Iwamatsu
5 * Copyright (C) 2008 Renesas Solutions Corp.
7 * SPDX-License-Identifier: GPL-2.0+
13 #define CONFIG_CPU_SH7203 1
15 #define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */
17 #define CONFIG_DISPLAY_BOARDINFO
18 #undef CONFIG_SHOW_BOOT_PROGRESS
21 #define RSK7203_SDRAM_BASE 0x0C000000
22 #define RSK7203_FLASH_BASE_1 0x20000000 /* Non cache */
23 #define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024)
25 #define CONFIG_SYS_LONGHELP /* undef to save memory */
26 /* List of legal baudrate settings for this board */
27 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
30 #define CONFIG_CONS_SCIF0 1
32 #define CONFIG_SYS_MEMTEST_START RSK7203_SDRAM_BASE
33 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (3 * 1024 * 1024))
35 #define CONFIG_SYS_SDRAM_BASE RSK7203_SDRAM_BASE
36 #define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024)
38 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1024 * 1024)
39 #define CONFIG_SYS_MONITOR_BASE RSK7203_FLASH_BASE_1
40 #define CONFIG_SYS_MONITOR_LEN (128 * 1024)
41 #define CONFIG_SYS_MALLOC_LEN (256 * 1024)
42 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
45 #define CONFIG_FLASH_CFI_DRIVER
46 #define CONFIG_SYS_FLASH_CFI
47 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
48 #undef CONFIG_SYS_FLASH_QUIET_TEST
49 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
50 #define CONFIG_SYS_FLASH_BASE RSK7203_FLASH_BASE_1
51 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
52 #define CONFIG_SYS_MAX_FLASH_SECT 64
53 #define CONFIG_SYS_MAX_FLASH_BANKS 1
55 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
56 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
57 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
58 #define CONFIG_SYS_FLASH_ERASE_TOUT 12000
59 #define CONFIG_SYS_FLASH_WRITE_TOUT 500
62 #define CONFIG_SYS_CLK_FREQ 33333333
63 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
64 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
65 #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
66 #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
68 #endif /* __RSK7203_H */