1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2021 Rockchip Electronics Co., Ltd
6 #ifndef __CONFIG_RK3568_COMMON_H
7 #define __CONFIG_RK3568_COMMON_H
9 #include "rockchip-common.h"
11 #define CONFIG_IRAM_BASE 0xfdcc0000
13 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
15 #define CONFIG_SYS_SDRAM_BASE 0
16 #define SDRAM_MAX_SIZE 0xf0000000
18 #ifndef CONFIG_SPL_BUILD
19 #define ENV_MEM_LAYOUT_SETTINGS \
20 "scriptaddr=0x00c00000\0" \
21 "pxefile_addr_r=0x00e00000\0" \
22 "fdt_addr_r=0x0a100000\0" \
23 "kernel_addr_r=0x02080000\0" \
24 "ramdisk_addr_r=0x0a200000\0"
26 #include <config_distro_bootcmd.h>
27 #define CONFIG_EXTRA_ENV_SETTINGS \
28 ENV_MEM_LAYOUT_SETTINGS \
29 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
30 "partitions=" PARTS_DEFAULT \
31 ROCKCHIP_DEVICE_SETTINGS \