1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
6 #ifndef __CONFIG_RK3399_COMMON_H
7 #define __CONFIG_RK3399_COMMON_H
9 #include "rockchip-common.h"
11 #define CONFIG_IRAM_BASE 0xff8c0000
13 #define CONFIG_SYS_INIT_SP_ADDR 0x00300000
15 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)
16 #define CONFIG_SPL_STACK 0x00400000
17 #define CONFIG_SPL_MAX_SIZE 0x40000
18 #define CONFIG_SPL_BSS_START_ADDR 0x00400000
19 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000
21 #define CONFIG_SPL_STACK 0xff8effff
22 #define CONFIG_SPL_MAX_SIZE 0x30000 - 0x2000
24 #define CONFIG_SPL_BSS_START_ADDR 0xff8e0000
25 #define CONFIG_SPL_BSS_MAX_SIZE 0x10000
28 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
31 #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000
33 /* RAW SD card / eMMC locations. */
35 /* FAT sd card locations. */
36 #define CONFIG_SYS_SDRAM_BASE 0
37 #define SDRAM_MAX_SIZE 0xf8000000
39 #ifndef CONFIG_SPL_BUILD
41 #define ENV_MEM_LAYOUT_SETTINGS \
42 "scriptaddr=0x00500000\0" \
43 "script_offset_f=0xffe000\0" \
44 "script_size_f=0x2000\0" \
45 "pxefile_addr_r=0x00600000\0" \
46 "fdt_addr_r=0x01f00000\0" \
47 "fdtoverlay_addr_r=0x02000000\0" \
48 "kernel_addr_r=0x02080000\0" \
49 "ramdisk_addr_r=0x06000000\0" \
50 "kernel_comp_addr_r=0x08000000\0" \
51 "kernel_comp_size=0x2000000\0"
53 #ifndef ROCKCHIP_DEVICE_SETTINGS
54 #define ROCKCHIP_DEVICE_SETTINGS
57 #include <config_distro_bootcmd.h>
58 #include <environment/distro/sf.h>
59 #define CONFIG_EXTRA_ENV_SETTINGS \
60 ENV_MEM_LAYOUT_SETTINGS \
61 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
62 "partitions=" PARTS_DEFAULT \
63 ROCKCHIP_DEVICE_SETTINGS \
67 "setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \
68 "run distro_bootcmd\0"