1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (c) 2016 Andreas Färber
6 #ifndef __CONFIG_RK3368_COMMON_H
7 #define __CONFIG_RK3368_COMMON_H
9 #include "rockchip-common.h"
11 #define CONFIG_SYS_CACHELINE_SIZE 64
13 #include <asm/arch-rockchip/hardware.h>
14 #include <linux/sizes.h>
16 #define CONFIG_SYS_SDRAM_BASE 0
17 #define SDRAM_MAX_SIZE 0xff000000
18 #define CONFIG_SYS_CBSIZE 1024
19 #define CONFIG_SKIP_LOWLEVEL_INIT
21 #define CONFIG_ROCKCHIP_STIMER_BASE 0xff830020
22 #define COUNTER_FREQUENCY 24000000
24 #define CONFIG_IRAM_BASE 0xff8c0000
26 #define CONFIG_SYS_INIT_SP_ADDR 0x00300000
27 #define CONFIG_SYS_LOAD_ADDR 0x00280000
29 #define CONFIG_SPL_MAX_SIZE 0x40000
30 #define CONFIG_SPL_BSS_START_ADDR 0x400000
31 #define CONFIG_SPL_BSS_MAX_SIZE 0x20000
32 #define CONFIG_SPL_STACK 0x00188000
34 #ifndef CONFIG_SPL_BUILD
35 #define ENV_MEM_LAYOUT_SETTINGS \
36 "scriptaddr=0x00500000\0" \
37 "pxefile_addr_r=0x00600000\0" \
38 "fdt_addr_r=0x5600000\0" \
39 "kernel_addr_r=0x280000\0" \
40 "ramdisk_addr_r=0x5bf0000\0"
42 #include <config_distro_bootcmd.h>
44 #define CONFIG_EXTRA_ENV_SETTINGS \
45 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
46 ENV_MEM_LAYOUT_SETTINGS \