1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
6 #ifndef __CONFIG_RK3308_COMMON_H
7 #define __CONFIG_RK3308_COMMON_H
9 #include "rockchip-common.h"
11 #define CONFIG_SYS_CBSIZE 1024
12 #define CONFIG_SPL_MAX_SIZE 0x20000
13 #define CONFIG_SPL_BSS_START_ADDR 0x00400000
14 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000
16 #define CONFIG_SYS_NS16550_MEM32
18 #define CONFIG_ROCKCHIP_STIMER_BASE 0xff1b00a0
19 #define CONFIG_IRAM_BASE 0xfff80000
20 #define CONFIG_SYS_INIT_SP_ADDR 0x00800000
21 #define CONFIG_SPL_STACK 0x00400000
22 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
24 #define COUNTER_FREQUENCY 24000000
26 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
28 #define CONFIG_SYS_SDRAM_BASE 0
29 #define SDRAM_MAX_SIZE 0xff000000
30 #define SDRAM_BANK_SIZE (2UL << 30)
32 #ifndef CONFIG_SPL_BUILD
34 #define ENV_MEM_LAYOUT_SETTINGS \
35 "scriptaddr=0x00500000\0" \
36 "pxefile_addr_r=0x00600000\0" \
37 "fdt_addr_r=0x02800000\0" \
38 "kernel_addr_r=0x00680000\0" \
39 "ramdisk_addr_r=0x04000000\0"
41 #include <config_distro_bootcmd.h>
42 #define CONFIG_EXTRA_ENV_SETTINGS \
43 ENV_MEM_LAYOUT_SETTINGS \
44 "partitions=" PARTS_DEFAULT \
45 ROCKCHIP_DEVICE_SETTINGS \