1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2015 Google, Inc
6 #ifndef __CONFIG_RK3288_COMMON_H
7 #define __CONFIG_RK3288_COMMON_H
9 #include <asm/arch-rockchip/hardware.h>
10 #include "rockchip-common.h"
12 #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* 16MB */
14 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
15 #define CONFIG_SYS_MALLOC_LEN (32 << 20)
16 #define CONFIG_SYS_CBSIZE 1024
18 #define CONFIG_ROCKCHIP_STIMER_BASE 0xff810020
19 #define COUNTER_FREQUENCY 24000000
20 #define CONFIG_SYS_ARCH_TIMER
21 #define CONFIG_SYS_HZ_CLOCK 24000000
23 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
24 /* Bootrom will load u-boot binary to 0x0 once return from SPL */
26 #define CONFIG_SYS_INIT_SP_ADDR 0x00100000
27 #define CONFIG_SYS_LOAD_ADDR 0x00800800
28 #define CONFIG_SPL_STACK 0xff718000
30 #define CONFIG_IRAM_BASE 0xff700000
32 /* RAW SD card / eMMC locations. */
33 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
35 /* FAT sd card locations. */
36 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
37 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
39 #define CONFIG_SYS_SDRAM_BASE 0
40 #define SDRAM_BANK_SIZE (2UL << 30)
41 #define SDRAM_MAX_SIZE 0xfe000000
43 #define CONFIG_SYS_MONITOR_LEN (600 * 1024)
45 #ifndef CONFIG_SPL_BUILD
47 #define ENV_MEM_LAYOUT_SETTINGS \
48 "scriptaddr=0x00000000\0" \
49 "pxefile_addr_r=0x00100000\0" \
50 "fdt_addr_r=0x01f00000\0" \
51 "kernel_addr_r=0x02000000\0" \
52 "ramdisk_addr_r=0x04000000\0"
54 #include <config_distro_bootcmd.h>
56 /* Linux fails to load the fdt if it's loaded above 256M on a Rock 2 board, so
57 * limit the fdt reallocation to that */
58 #define CONFIG_EXTRA_ENV_SETTINGS \
59 "fdt_high=0x0fffffff\0" \
60 "initrd_high=0x0fffffff\0" \
61 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
62 "partitions=" PARTS_DEFAULT \
63 ENV_MEM_LAYOUT_SETTINGS \
64 ROCKCHIP_DEVICE_SETTINGS \