include/configs/rk3188_common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2015 Google, Inc
   4  */
   5
   6 #ifndef __CONFIG_RK3188_COMMON_H
   7 #define __CONFIG_RK3188_COMMON_H
   8
   9 #define CONFIG_SYS_CACHELINE_SIZE       64
  10
  11 #include <asm/arch-rockchip/hardware.h>
  12 #include "rockchip-common.h"
  13
  14 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
  15 #define CONFIG_SYS_CBSIZE               1024
  16
  17 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
  18 /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */
  19 #endif
  20 #define CONFIG_SYS_INIT_SP_ADDR         0x60100000
  21 #define CONFIG_SYS_LOAD_ADDR            0x60800800
  22
  23 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE   (0x8000 - 0x800)
  24 #define CONFIG_ROCKCHIP_CHIP_TAG        "RK31"
  25 #define CONFIG_IRAM_BASE        0x10080000
  26
  27 /* spl size 32kb sram - 2kb bootrom */
  28 #define CONFIG_SPL_MAX_SIZE             (0x8000 - 0x800)
  29 #define CONFIG_ROCKCHIP_SERIAL          1
  30
  31 #define CONFIG_SPL_STACK                0x10087fff
  32
  33 #define CONFIG_SYS_SDRAM_BASE           0x60000000
  34 #define SDRAM_BANK_SIZE                 (2UL << 30)
  35 #define SDRAM_MAX_SIZE                  0x80000000
  36
  37 #ifndef CONFIG_SPL_BUILD
  38 /* usb otg */
  39
  40 /* usb host support */
  41 #define ENV_MEM_LAYOUT_SETTINGS \
  42         "scriptaddr=0x60000000\0" \
  43         "pxefile_addr_r=0x60100000\0" \
  44         "fdt_addr_r=0x61f00000\0" \
  45         "kernel_addr_r=0x62000000\0" \
  46         "ramdisk_addr_r=0x64000000\0"
  47
  48 #include <config_distro_bootcmd.h>
  49
  50 /* Linux fails to load the fdt if it's loaded above 256M on a Rock board,
  51  * so limit the fdt reallocation to that */
  52 #define CONFIG_EXTRA_ENV_SETTINGS \
  53         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
  54         "fdt_high=0x6fffffff\0" \
  55         "initrd_high=0x6fffffff\0" \
  56         "partitions=" PARTS_DEFAULT \
  57         ENV_MEM_LAYOUT_SETTINGS \
  58         ROCKCHIP_DEVICE_SETTINGS \
  59         BOOTENV
  60
  61 #endif /* CONFIG_SPL_BUILD */
  62
  63 #endif