1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
6 #ifndef __CONFIG_RK3128_COMMON_H
7 #define __CONFIG_RK3128_COMMON_H
9 #include "rockchip-common.h"
11 #define CFG_SYS_HZ_CLOCK 24000000
13 #define CFG_IRAM_BASE 0x10080000
15 #define CFG_SYS_SDRAM_BASE 0x60000000
16 #define SDRAM_MAX_SIZE 0x80000000
18 #define ENV_MEM_LAYOUT_SETTINGS \
19 "scriptaddr=0x60500000\0" \
20 "pxefile_addr_r=0x60600000\0" \
21 "fdt_addr_r=0x61f00000\0" \
22 "kernel_addr_r=0x62000000\0" \
23 "ramdisk_addr_r=0x64000000\0"
25 #define CFG_EXTRA_ENV_SETTINGS \
26 ENV_MEM_LAYOUT_SETTINGS \
27 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
28 "partitions=" PARTS_DEFAULT \
29 "boot_targets=" BOOT_TARGETS "\0"