1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
6 #ifndef __CONFIG_RK3128_COMMON_H
7 #define __CONFIG_RK3128_COMMON_H
9 #include "rockchip-common.h"
11 #define CONFIG_SYS_MAXARGS 16
12 #define CONFIG_BAUDRATE 115200
13 #define CONFIG_SYS_MALLOC_LEN (32 << 20)
14 #define CONFIG_SYS_CBSIZE 1024
15 #define CONFIG_SKIP_LOWLEVEL_INIT
17 #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
18 #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */
19 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
21 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000
22 #define CONFIG_SYS_LOAD_ADDR 0x60800800
24 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
26 /* RAW SD card / eMMC locations. */
27 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
29 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
30 #define CONFIG_SYS_SDRAM_BASE 0x60000000
31 #define SDRAM_MAX_SIZE 0x80000000
33 #define CONFIG_SPI_FLASH
34 #define CONFIG_SF_DEFAULT_SPEED 20000000
35 #define CONFIG_USB_OHCI_NEW
36 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
38 #ifndef CONFIG_SPL_BUILD
40 /* usb mass storage */
42 #define ENV_MEM_LAYOUT_SETTINGS \
43 "scriptaddr=0x60500000\0" \
44 "pxefile_addr_r=0x60600000\0" \
45 "fdt_addr_r=0x61f00000\0" \
46 "kernel_addr_r=0x62000000\0" \
47 "ramdisk_addr_r=0x64000000\0"
49 #include <config_distro_bootcmd.h>
50 #define CONFIG_EXTRA_ENV_SETTINGS \
51 ENV_MEM_LAYOUT_SETTINGS \
52 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
53 "partitions=" PARTS_DEFAULT \