1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
6 #ifndef __CONFIG_RK3128_COMMON_H
7 #define __CONFIG_RK3128_COMMON_H
9 #include "rockchip-common.h"
11 #define CONFIG_SYS_MAXARGS 16
12 #define CONFIG_BAUDRATE 115200
13 #define CONFIG_SYS_CBSIZE 1024
14 #define CONFIG_SKIP_LOWLEVEL_INIT
16 #define CONFIG_ROCKCHIP_STIMER_BASE 0x200440a0
17 #define COUNTER_FREQUENCY 24000000
18 #define CONFIG_SYS_ARCH_TIMER
19 #define CONFIG_SYS_HZ_CLOCK 24000000
21 #define CONFIG_IRAM_BASE 0x10080000
23 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000
24 #define CONFIG_SYS_LOAD_ADDR 0x60800800
26 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
28 /* RAW SD card / eMMC locations. */
30 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
31 #define CONFIG_SYS_SDRAM_BASE 0x60000000
32 #define SDRAM_MAX_SIZE 0x80000000
34 #define CONFIG_USB_OHCI_NEW
35 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
37 #ifndef CONFIG_SPL_BUILD
39 /* usb mass storage */
41 #define ENV_MEM_LAYOUT_SETTINGS \
42 "scriptaddr=0x60500000\0" \
43 "pxefile_addr_r=0x60600000\0" \
44 "fdt_addr_r=0x61f00000\0" \
45 "kernel_addr_r=0x62000000\0" \
46 "ramdisk_addr_r=0x64000000\0"
48 #include <config_distro_bootcmd.h>
49 #define CONFIG_EXTRA_ENV_SETTINGS \
50 ENV_MEM_LAYOUT_SETTINGS \
51 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
52 "partitions=" PARTS_DEFAULT \