1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2015 Google, Inc
6 #ifndef __CONFIG_RK3066_COMMON_H
7 #define __CONFIG_RK3066_COMMON_H
9 #include <asm/arch-rockchip/hardware.h>
10 #include "rockchip-common.h"
12 #define CFG_IRAM_BASE 0x10080000
14 #define CFG_SYS_SDRAM_BASE 0x60000000
15 #define SDRAM_BANK_SIZE (1024UL << 20UL)
16 #define SDRAM_MAX_SIZE CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE
18 #define ENV_MEM_LAYOUT_SETTINGS \
19 "scriptaddr=0x60000000\0" \
20 "pxefile_addr_r=0x60100000\0" \
21 "fdt_addr_r=0x61f00000\0" \
22 "kernel_addr_r=0x62000000\0" \
23 "ramdisk_addr_r=0x64000000\0"
25 #define CFG_EXTRA_ENV_SETTINGS \
26 "fdt_high=0x6fffffff\0" \
27 "initrd_high=0x6fffffff\0" \
28 "partitions=" PARTS_DEFAULT \
29 ENV_MEM_LAYOUT_SETTINGS \
30 ROCKCHIP_DEVICE_SETTINGS \
31 "boot_targets=" BOOT_TARGETS "\0"