include/configs/rk3066_common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2015 Google, Inc
   4  */
   5
   6 #ifndef __CONFIG_RK3066_COMMON_H
   7 #define __CONFIG_RK3066_COMMON_H
   8
   9 #include <asm/arch-rockchip/hardware.h>
  10 #include "rockchip-common.h"
  11
  12 #define CONFIG_SYS_CBSIZE               256
  13
  14 #define CONFIG_SYS_INIT_SP_ADDR         0x78000000
  15
  16 #define CONFIG_IRAM_BASE                0x10080000
  17
  18 #define CONFIG_SPL_MAX_SIZE             0x32000
  19
  20 #define CONFIG_SPL_STACK                0x1008FFFF
  21
  22 #define CONFIG_SYS_SDRAM_BASE           0x60000000
  23 #define SDRAM_BANK_SIZE                 (1024UL << 20UL)
  24 #define SDRAM_MAX_SIZE                  CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE
  25
  26 #ifndef CONFIG_SPL_BUILD
  27
  28 #define ENV_MEM_LAYOUT_SETTINGS \
  29         "scriptaddr=0x60000000\0" \
  30         "pxefile_addr_r=0x60100000\0" \
  31         "fdt_addr_r=0x61f00000\0" \
  32         "kernel_addr_r=0x62000000\0" \
  33         "ramdisk_addr_r=0x64000000\0"
  34
  35 #include <config_distro_bootcmd.h>
  36
  37 #define CONFIG_EXTRA_ENV_SETTINGS \
  38         "fdt_high=0x6fffffff\0" \
  39         "initrd_high=0x6fffffff\0" \
  40         "partitions=" PARTS_DEFAULT \
  41         ENV_MEM_LAYOUT_SETTINGS \
  42         ROCKCHIP_DEVICE_SETTINGS \
  43         BOOTENV
  44
  45 #endif /* CONFIG_SPL_BUILD */
  46
  47 #endif