1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2015 Rockchip Electronics Co., Ltd
5 #ifndef __CONFIG_RK3036_COMMON_H
6 #define __CONFIG_RK3036_COMMON_H
8 #include <asm/arch/hardware.h>
9 #include "rockchip-common.h"
11 #define CONFIG_NR_DRAM_BANKS 1
12 #define CONFIG_SYS_MALLOC_LEN (32 << 20)
13 #define CONFIG_SYS_CBSIZE 1024
14 #define CONFIG_SKIP_LOWLEVEL_INIT
16 #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
17 #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */
18 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
20 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000
21 #define CONFIG_SYS_LOAD_ADDR 0x60800800
22 #define CONFIG_SPL_STACK 0x10081fff
23 #define CONFIG_SPL_TEXT_BASE 0x10081000
25 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10)
26 #define CONFIG_ROCKCHIP_CHIP_TAG "RK30"
29 #define CONFIG_BOUNCE_BUFFER
31 #define CONFIG_SYS_SDRAM_BASE 0x60000000
32 #define CONFIG_NR_DRAM_BANKS 1
33 #define SDRAM_BANK_SIZE (512UL << 20UL)
34 #define SDRAM_MAX_SIZE (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE)
36 #define CONFIG_SPI_FLASH
37 #define CONFIG_SPI_FLASH_GIGADEVICE
38 #define CONFIG_SF_DEFAULT_SPEED 20000000
40 #ifndef CONFIG_SPL_BUILD
43 /* usb mass storage */
44 #define CONFIG_CMD_USB_MASS_STORAGE
47 #define ENV_MEM_LAYOUT_SETTINGS \
48 "scriptaddr=0x60000000\0" \
49 "pxefile_addr_r=0x60100000\0" \
50 "fdt_addr_r=0x61f00000\0" \
51 "kernel_addr_r=0x62000000\0" \
52 "ramdisk_addr_r=0x64000000\0"
54 #include <config_distro_bootcmd.h>
56 /* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board,
57 * so limit the fdt reallocation to that */
58 #define CONFIG_EXTRA_ENV_SETTINGS \
59 "fdt_high=0x7fffffff\0" \
60 "partitions=" PARTS_DEFAULT \
61 ENV_MEM_LAYOUT_SETTINGS \
65 #define CONFIG_PREBOOT