2 * (C) Copyright 2015 Rockchip Electronics Co., Ltd
4 * SPDX-License-Identifier: GPL-2.0+
6 #ifndef __CONFIG_RK3036_COMMON_H
7 #define __CONFIG_RK3036_COMMON_H
9 #include <asm/arch/hardware.h>
10 #include "rockchip-common.h"
12 #define CONFIG_NR_DRAM_BANKS 1
13 #define CONFIG_SYS_MALLOC_LEN (32 << 20)
14 #define CONFIG_SYS_CBSIZE 1024
15 #define CONFIG_SKIP_LOWLEVEL_INIT
17 #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
18 #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */
19 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
21 #define CONFIG_SYS_NS16550
22 #define CONFIG_SYS_NS16550_MEM32
24 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000
25 #define CONFIG_SYS_LOAD_ADDR 0x60800800
26 #define CONFIG_SPL_STACK 0x10081fff
27 #define CONFIG_SPL_TEXT_BASE 0x10081000
29 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10)
30 #define CONFIG_ROCKCHIP_CHIP_TAG "RK30"
33 #define CONFIG_BOUNCE_BUFFER
35 #define CONFIG_SYS_SDRAM_BASE 0x60000000
36 #define CONFIG_NR_DRAM_BANKS 1
37 #define SDRAM_BANK_SIZE (512UL << 20UL)
38 #define SDRAM_MAX_SIZE (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE)
40 #define CONFIG_SPI_FLASH
42 #define CONFIG_SPI_FLASH_GIGADEVICE
43 #define CONFIG_SF_DEFAULT_SPEED 20000000
45 #ifndef CONFIG_SPL_BUILD
48 /* usb mass storage */
49 #define CONFIG_CMD_USB_MASS_STORAGE
52 #define ENV_MEM_LAYOUT_SETTINGS \
53 "scriptaddr=0x60000000\0" \
54 "pxefile_addr_r=0x60100000\0" \
55 "fdt_addr_r=0x61f00000\0" \
56 "kernel_addr_r=0x62000000\0" \
57 "ramdisk_addr_r=0x64000000\0"
59 #include <config_distro_bootcmd.h>
61 /* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board,
62 * so limit the fdt reallocation to that */
63 #define CONFIG_EXTRA_ENV_SETTINGS \
64 "fdt_high=0x7fffffff\0" \
65 "partitions=" PARTS_DEFAULT \
66 ENV_MEM_LAYOUT_SETTINGS \
70 #define CONFIG_PREBOOT