1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the Renesas R7780MP board
5 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
12 #define CONFIG_CPU_SH7780 1
13 #define CONFIG_R7780MP 1
14 #define CONFIG_SYS_R7780MP_OLD_FLASH 1
15 #define __LITTLE_ENDIAN__ 1
17 #define CONFIG_DISPLAY_BOARDINFO
19 #define CONFIG_CONS_SCIF0 1
21 #define CONFIG_ENV_OVERWRITE 1
23 #define CONFIG_SYS_SDRAM_BASE (0x08000000)
24 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
26 #define CONFIG_SYS_PBSIZE 256
28 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
29 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
31 /* Flash board support */
32 #define CONFIG_SYS_FLASH_BASE (0xA0000000)
33 #ifdef CONFIG_SYS_R7780MP_OLD_FLASH
34 /* NOR Flash (S29PL127J60TFI130) */
35 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
36 # define CONFIG_SYS_MAX_FLASH_BANKS (2)
37 # define CONFIG_SYS_MAX_FLASH_SECT 270
38 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\
39 CONFIG_SYS_FLASH_BASE + 0x100000,\
40 CONFIG_SYS_FLASH_BASE + 0x400000,\
41 CONFIG_SYS_FLASH_BASE + 0x700000, }
42 #else /* CONFIG_SYS_R7780MP_OLD_FLASH */
43 /* NOR Flash (Spantion S29GL256P) */
44 # define CONFIG_SYS_MAX_FLASH_BANKS (1)
45 # define CONFIG_SYS_MAX_FLASH_SECT 256
46 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
47 #endif /* CONFIG_SYS_R7780MP_OLD_FLASH */
49 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
50 /* Address of u-boot image in Flash */
51 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
52 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
53 /* Size of DRAM reserved for malloc() use */
54 #define CONFIG_SYS_MALLOC_LEN (1204 * 1024)
56 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
57 #define CONFIG_SYS_RX_ETH_BUFFER (8)
59 #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
60 #undef CONFIG_SYS_FLASH_QUIET_TEST
61 /* print 'E' for empty sector on flinfo */
62 #define CONFIG_SYS_FLASH_EMPTY_INFO
64 #define CONFIG_ENV_SECT_SIZE (256 * 1024)
65 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
66 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
67 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000
68 #define CONFIG_SYS_FLASH_WRITE_TOUT 500
71 #define CONFIG_SYS_CLK_FREQ 33333333
72 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
75 #if defined(CONFIG_CMD_PCI)
76 #define CONFIG_SH4_PCI
77 #define CONFIG_SH7780_PCI
78 #define CONFIG_SH7780_PCI_LSR 0x07f00001
79 #define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE
80 #define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE
81 #define CONFIG_PCI_SCAN_SHOW 1
84 #define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */
85 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
86 #define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */
88 #define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */
89 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
90 #define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */
91 #define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE
92 #define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE
93 #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
94 #endif /* CONFIG_CMD_PCI */
96 #if defined(CONFIG_CMD_NET)
97 /* AX88796L Support(NE2000 base chip) */
98 #define CONFIG_DRIVER_AX88796L
99 #define CONFIG_DRIVER_NE2000_BASE 0xA4100000
102 /* Compact flash Support */
103 #if defined(CONFIG_IDE)
104 #define CONFIG_IDE_RESET 1
105 #define CONFIG_SYS_PIO_MODE 1
106 #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */
107 #define CONFIG_SYS_IDE_MAXDEVICE 1
108 #define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000
109 #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */
110 #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */
111 #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */
112 #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */
113 #define CONFIG_IDE_SWAP_IO
114 #endif /* CONFIG_IDE */
116 #endif /* __R7780RP_H */