2 * Copyright (C) 2009, Ilya Yanok, Emcraft Systems, <yanok@emcraft.com>
4 * Configuration settings for the Dave/DENX QongEVB-LITE board.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/arch/mx31-regs.h>
27 /* High Level Configuration Options */
28 #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
29 #define CONFIG_MX31 1 /* in a mx31 */
31 #define CONFIG_MX31_HCLK_FREQ 26000000 /* 26MHz */
32 #define CONFIG_MX31_CLK32 32768
34 #define CONFIG_DISPLAY_CPUINFO
35 #define CONFIG_DISPLAY_BOARDINFO
37 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
38 #define CONFIG_SETUP_MEMORY_TAGS 1
39 #define CONFIG_INITRD_TAG 1
42 * Size of malloc() pool
44 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
45 /* size in bytes reserved for initial data */
46 #define CONFIG_SYS_GBL_DATA_SIZE 128
52 #define CONFIG_MXC_UART 1
53 #define CONFIG_SYS_MX31_UART1 1
55 #define CONFIG_MX31_GPIO
57 #define CONFIG_MXC_SPI
58 #define CONFIG_DEFAULT_SPI_BUS 1
59 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)
60 #define CONFIG_RTC_MC13783
62 #define CONFIG_FSL_PMIC
63 #define CONFIG_FSL_PMIC_BUS 1
64 #define CONFIG_FSL_PMIC_CS 0
65 #define CONFIG_FSL_PMIC_CLK 100000
66 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_2 | SPI_CS_HIGH)
69 #define CONFIG_QONG_FPGA 1
70 #define CONFIG_FPGA_BASE (CS1_BASE)
72 #ifdef CONFIG_QONG_FPGA
75 #define CONFIG_DNET_BASE (CS1_BASE + QONG_FPGA_PERIPH_SIZE)
76 #define CONFIG_NET_MULTI 1
78 /* Framebuffer and LCD */
80 #define CONFIG_VIDEO_MX3
81 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
82 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
83 #define LCD_BPP LCD_COLOR16
84 #define CONFIG_SPLASH_SCREEN
85 #define CONFIG_CMD_BMP
86 #define CONFIG_BMP_16BPP
87 #define CONFIG_DISPLAY_COM57H5M10XRC
90 * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the
91 * initial TFTP transfer, should the user wish one, significantly.
93 #define CONFIG_ARP_TIMEOUT 200UL
95 #endif /* CONFIG_QONG_FPGA */
97 #define CONFIG_CONS_INDEX 1
98 #define CONFIG_BAUDRATE 115200
99 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
101 /***********************************************************
103 ***********************************************************/
105 #include <config_cmd_default.h>
107 #define CONFIG_CMD_CACHE
108 #define CONFIG_CMD_PING
109 #define CONFIG_CMD_DHCP
110 #define CONFIG_CMD_NET
111 #define CONFIG_CMD_MII
112 #define CONFIG_CMD_NAND
113 #define CONFIG_CMD_SPI
114 #define CONFIG_CMD_DATE
115 #define BOARD_LATE_INIT
118 * You can compile in a MAC address and your custom net settings by using
119 * the following syntax.
121 * #define CONFIG_ETHADDR xx:xx:xx:xx:xx:xx
122 * #define CONFIG_SERVERIP <server ip>
123 * #define CONFIG_IPADDR <board ip>
124 * #define CONFIG_GATEWAYIP <gateway ip>
125 * #define CONFIG_NETMASK <your netmask>
128 #define CONFIG_BOOTDELAY 5
130 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
132 #define xstr(s) str(s)
135 #define CONFIG_EXTRA_ENV_SETTINGS \
137 "nfsargs=setenv bootargs root=/dev/nfs rw " \
138 "nfsroot=${serverip}:${rootpath}\0" \
139 "ramargs=setenv bootargs root=/dev/ram rw\0" \
140 "addip=setenv bootargs ${bootargs} " \
141 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
142 ":${hostname}:${netdev}:off panic=1\0" \
143 "addtty=setenv bootargs ${bootargs}" \
144 " console=ttymxc0,${baudrate}\0" \
145 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
146 "addmisc=setenv bootargs ${bootargs}\0" \
147 "uboot_addr=A0000000\0" \
148 "kernel_addr=A00A0000\0" \
149 "ramdisk_addr=A0300000\0" \
150 "u-boot=qong/u-boot.bin\0" \
151 "kernel_addr_r=80800000\0" \
153 "bootfile=qong/uImage\0" \
154 "rootpath=/opt/eldk-4.2-arm/armVFP\0" \
155 "flash_self=run ramargs addip addtty addmtd addmisc;" \
156 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
157 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
158 "bootm ${kernel_addr}\0" \
159 "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
160 "run nfsargs addip addtty addmtd addmisc;" \
162 "bootcmd=run flash_self\0" \
163 "load=tftp ${loadaddr} ${u-boot}\0" \
164 "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \
165 " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \
166 " +${filesize};cp.b ${fileaddr} " \
167 xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
168 "upd=run load update\0" \
171 * Miscellaneous configurable options
173 #define CONFIG_SYS_LONGHELP /* undef to save memory */
174 #define CONFIG_SYS_PROMPT "=> "
175 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
176 /* Print Buffer Size */
177 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
178 sizeof(CONFIG_SYS_PROMPT) + 16)
179 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
180 /* Boot Argument Buffer Size */
181 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
183 /* memtest works on first 255MB of RAM */
184 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
185 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0xff000000)
187 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
189 #define CONFIG_SYS_HZ 1000
191 #define CONFIG_CMDLINE_EDITING 1
192 #define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
193 #ifdef CONFIG_SYS_HUSH_PARSER
194 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
197 #define CONFIG_MISC_INIT_R 1
198 /*-----------------------------------------------------------------------
201 * The stack sizes are set up in start.S using the settings below
203 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
205 /*-----------------------------------------------------------------------
206 * Physical Memory Map
208 #define CONFIG_NR_DRAM_BANKS 1
209 #define PHYS_SDRAM_1 CSD0_BASE
210 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
217 extern void qong_nand_plat_init(void *chip);
218 extern int qong_nand_rdy(void *chip);
220 #define CONFIG_NAND_PLAT
221 #define CONFIG_SYS_MAX_NAND_DEVICE 1
222 #define CONFIG_SYS_NAND_BASE CS3_BASE
223 #define NAND_PLAT_INIT() qong_nand_plat_init(nand)
225 #define QONG_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 24))
226 #define QONG_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 23))
227 #define QONG_NAND_WRITE(addr, cmd) \
229 __REG8(addr) = cmd; \
232 #define NAND_PLAT_WRITE_CMD(chip, cmd) QONG_NAND_WRITE(QONG_NAND_CLE(chip), cmd)
233 #define NAND_PLAT_WRITE_ADR(chip, cmd) QONG_NAND_WRITE(QONG_NAND_ALE(chip), cmd)
234 #define NAND_PLAT_DEV_READY(chip) (qong_nand_rdy(chip))
236 /*-----------------------------------------------------------------------
237 * FLASH and environment organization
239 #define CONFIG_SYS_FLASH_BASE CS0_BASE
240 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
241 /* max number of sectors on one chip */
242 #define CONFIG_SYS_MAX_FLASH_SECT 1024
243 /* Monitor at beginning of flash */
244 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
245 #define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
247 #define CONFIG_ENV_IS_IN_FLASH 1
248 #define CONFIG_ENV_SECT_SIZE 0x20000
249 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
250 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x60000)
252 /* Address and size of Redundant Environment Sector */
253 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
254 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
256 /*-----------------------------------------------------------------------
257 * CFI FLASH driver setup
259 /* Flash memory is CFI compliant */
260 #define CONFIG_SYS_FLASH_CFI 1
261 /* Use drivers/cfi_flash.c */
262 #define CONFIG_FLASH_CFI_DRIVER 1
263 /* Use buffered writes (~10x faster) */
264 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
265 /* Use hardware sector protection */
266 #define CONFIG_SYS_FLASH_PROTECTION 1
271 #define CONFIG_CMD_JFFS2
272 #define CONFIG_CMD_UBI
273 #define CONFIG_CMD_UBIFS
274 #define CONFIG_RBTREE
275 #define CONFIG_MTD_PARTITIONS
276 #define CONFIG_CMD_MTDPARTS
278 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
279 #define CONFIG_FLASH_CFI_MTD
280 #define MTDIDS_DEFAULT "nor0=physmap-flash.0"
281 #define MTDPARTS_DEFAULT \
282 "mtdparts=physmap-flash.0:384k(U-Boot),128k(env1)," \
283 "128k(env2),2432k(kernel),13m(ramdisk),-(user)"
285 /* additions for new relocation code, must added to all boards */
286 #undef CONFIG_SYS_ARM_WITHOUT_RELOC /* This board is tested with relocation support */
287 #define CONFIG_SYS_SDRAM_BASE 0x80000000
288 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
289 #define CONFIG_SYS_INIT_RAM_END IRAM_SIZE
290 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
291 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
293 #define CONFIG_BOARD_EARLY_INIT_F 1
295 #endif /* __CONFIG_H */