1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2011-2014 Freescale Semiconductor, Inc.
7 * Corenet DS style board configuration file
9 #ifndef __QEMU_PPCE500_H
10 #define __QEMU_PPCE500_H
12 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
14 #define CONFIG_SYS_RAMBOOT
16 #define CONFIG_PCI1 1 /* PCI controller 1 */
17 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
18 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
20 #define CONFIG_ENABLE_36BIT_PHYS
22 /* Needed to fill the ccsrbar pointer */
24 /* Virtual address to CCSRBAR */
25 #define CONFIG_SYS_CCSRBAR 0xe0000000
26 /* Physical address should be a function call */
28 extern unsigned long long get_phys_ccsrbar_addr_early(void);
29 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32)
30 #define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early()
32 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0
33 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
36 /* Virtual address range for PCI region maps */
37 #define CONFIG_SYS_PCI_MAP_START 0x80000000
38 #define CONFIG_SYS_PCI_MAP_END 0xe8000000
40 /* Virtual address to a temporary map if we need it (max 128MB) */
41 #define CONFIG_SYS_TMPVIRT 0xe8000000
46 #define CONFIG_VERY_BIG_RAM
47 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
48 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
50 #define CONFIG_CHIP_SELECTS_PER_CTRL 0
52 #define CONFIG_SYS_CLK_FREQ 33000000
54 #define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */
56 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
58 #define CONFIG_HWCONFIG
60 #define CONFIG_SYS_INIT_RAM_ADDR 0x00100000
61 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0
62 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000
63 /* The assembler doesn't like typecast */
64 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
65 ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
66 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
67 #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
69 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
70 GENERATED_GBL_DATA_SIZE)
71 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
73 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
74 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
76 #define CONFIG_SYS_NS16550_SERIAL
77 #define CONFIG_SYS_NS16550_REG_SIZE 1
78 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
80 #define CONFIG_SYS_BAUDRATE_TABLE \
81 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
83 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
84 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
88 * Memory space is mapped 1-1, but I/O space must start from 0.
92 #define CONFIG_PCI_INDIRECT_BRIDGE
94 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
95 #endif /* CONFIG_PCI */
103 #define CONFIG_LOADS_ECHO /* echo on for serial download */
106 * Miscellaneous configurable options
108 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
111 * For booting Linux, the board info and command line data
112 * have to be in the first 64 MB of memory, since this is
113 * the maximum mapped by the Linux kernel during initialization.
115 #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/
116 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
119 * Environment Configuration
121 #define CONFIG_ROOTPATH "/opt/nfsroot"
122 #define CONFIG_BOOTFILE "uImage"
123 #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
125 /* default location for tftp and bootm */
126 #define CONFIG_LOADADDR 1000000
128 #define CONFIG_BOOTCOMMAND \
129 "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0"
131 #endif /* __QEMU_PPCE500_H */