2 * Copyright 2011-2014 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
8 * Corenet DS style board configuration file
10 #ifndef __QEMU_PPCE500_H
11 #define __QEMU_PPCE500_H
13 #define CONFIG_CMD_REGINFO
15 /* High Level Configuration Options */
17 #define CONFIG_E500 /* BOOKE e500 family */
18 #define CONFIG_QEMU_E500
20 #undef CONFIG_SYS_TEXT_BASE
21 #define CONFIG_SYS_TEXT_BASE 0xf01000 /* 15 MB */
23 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
25 #define CONFIG_SYS_RAMBOOT
27 #define CONFIG_PCI /* Enable PCI/PCIE */
28 #define CONFIG_PCI1 1 /* PCI controller 1 */
29 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
30 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
32 #define CONFIG_ENV_OVERWRITE
34 #define CONFIG_ENABLE_36BIT_PHYS
36 #define CONFIG_ADDR_MAP
37 #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
39 #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
40 #define CONFIG_SYS_MEMTEST_END 0x00400000
41 #define CONFIG_SYS_ALT_MEMTEST
42 #define CONFIG_PANIC_HANG /* do not reset board on panic */
44 /* Needed to fill the ccsrbar pointer */
45 #define CONFIG_BOARD_EARLY_INIT_F
47 /* Virtual address to CCSRBAR */
48 #define CONFIG_SYS_CCSRBAR 0xe0000000
49 /* Physical address should be a function call */
51 extern unsigned long long get_phys_ccsrbar_addr_early(void);
52 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32)
53 #define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early()
55 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0
56 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
59 #define CONFIG_PHYS_64BIT
61 /* Virtual address range for PCI region maps */
62 #define CONFIG_SYS_PCI_MAP_START 0x80000000
63 #define CONFIG_SYS_PCI_MAP_END 0xe8000000
65 /* Virtual address to a temporary map if we need it (max 128MB) */
66 #define CONFIG_SYS_TMPVIRT 0xe8000000
71 #define CONFIG_VERY_BIG_RAM
72 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
73 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
75 #define CONFIG_CHIP_SELECTS_PER_CTRL 0
77 #define CONFIG_SYS_CLK_FREQ 33000000
79 #define CONFIG_SYS_NO_FLASH
81 #define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */
83 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
85 #define CONFIG_ENV_IS_NOWHERE
87 #define CONFIG_HWCONFIG
89 #define CONFIG_SYS_INIT_RAM_ADDR 0x00100000
90 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0
91 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000
92 /* The assembler doesn't like typecast */
93 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
94 ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
95 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
96 #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
98 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
99 GENERATED_GBL_DATA_SIZE)
100 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
102 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
103 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
105 #define CONFIG_CONS_INDEX 1
106 #define CONFIG_SYS_NS16550_SERIAL
107 #define CONFIG_SYS_NS16550_REG_SIZE 1
108 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
110 #define CONFIG_SYS_BAUDRATE_TABLE \
111 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
113 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
114 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
118 * Memory space is mapped 1-1, but I/O space must start from 0.
122 #define CONFIG_PCI_INDIRECT_BRIDGE
123 #define CONFIG_PCI_PNP /* do pci plug-and-play */
125 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
126 #define CONFIG_DOS_PARTITION
127 #endif /* CONFIG_PCI */
130 #define CONFIG_DOS_PARTITION
135 #define CONFIG_ENV_SIZE 0x2000
137 #define CONFIG_LOADS_ECHO /* echo on for serial download */
139 #define CONFIG_LAST_STAGE_INIT
142 * Command line configuration.
144 #define CONFIG_CMD_IRQ
147 #define CONFIG_CMD_PCI
151 * Miscellaneous configurable options
153 #define CONFIG_SYS_LONGHELP /* undef to save memory */
154 #define CONFIG_CMDLINE_EDITING /* Command-line editing */
155 #define CONFIG_AUTO_COMPLETE /* add autocompletion support */
156 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
157 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
158 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
159 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
160 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
163 * For booting Linux, the board info and command line data
164 * have to be in the first 64 MB of memory, since this is
165 * the maximum mapped by the Linux kernel during initialization.
167 #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/
168 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
171 * Environment Configuration
173 #define CONFIG_ROOTPATH "/opt/nfsroot"
174 #define CONFIG_BOOTFILE "uImage"
175 #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
177 /* default location for tftp and bootm */
178 #define CONFIG_LOADADDR 1000000
180 #define CONFIG_BAUDRATE 115200
182 #define CONFIG_BOOTDELAY 1
183 #define CONFIG_BOOTCOMMAND \
184 "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0"
186 #endif /* __QEMU_PPCE500_H */