1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2011-2014 Freescale Semiconductor, Inc.
7 * Corenet DS style board configuration file
9 #ifndef __QEMU_PPCE500_H
10 #define __QEMU_PPCE500_H
12 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
14 #define CONFIG_SYS_RAMBOOT
16 #define CONFIG_PCI1 1 /* PCI controller 1 */
17 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
18 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
20 #define CONFIG_ENV_OVERWRITE
22 #define CONFIG_ENABLE_36BIT_PHYS
24 #define CONFIG_ADDR_MAP
25 #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
27 #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
28 #define CONFIG_SYS_MEMTEST_END 0x00400000
30 /* Needed to fill the ccsrbar pointer */
32 /* Virtual address to CCSRBAR */
33 #define CONFIG_SYS_CCSRBAR 0xe0000000
34 /* Physical address should be a function call */
36 extern unsigned long long get_phys_ccsrbar_addr_early(void);
37 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32)
38 #define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early()
40 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0
41 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
44 /* Virtual address range for PCI region maps */
45 #define CONFIG_SYS_PCI_MAP_START 0x80000000
46 #define CONFIG_SYS_PCI_MAP_END 0xe8000000
48 /* Virtual address to a temporary map if we need it (max 128MB) */
49 #define CONFIG_SYS_TMPVIRT 0xe8000000
54 #define CONFIG_VERY_BIG_RAM
55 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
56 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
58 #define CONFIG_CHIP_SELECTS_PER_CTRL 0
60 #define CONFIG_SYS_CLK_FREQ 33000000
62 #define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */
64 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
66 #define CONFIG_HWCONFIG
68 #define CONFIG_SYS_INIT_RAM_ADDR 0x00100000
69 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0
70 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000
71 /* The assembler doesn't like typecast */
72 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
73 ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
74 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
75 #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
77 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
78 GENERATED_GBL_DATA_SIZE)
79 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
81 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
82 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
84 #define CONFIG_SYS_NS16550_SERIAL
85 #define CONFIG_SYS_NS16550_REG_SIZE 1
86 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
88 #define CONFIG_SYS_BAUDRATE_TABLE \
89 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
91 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
92 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
96 * Memory space is mapped 1-1, but I/O space must start from 0.
100 #define CONFIG_PCI_INDIRECT_BRIDGE
102 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
103 #endif /* CONFIG_PCI */
110 #define CONFIG_ENV_SIZE 0x2000
112 #define CONFIG_LOADS_ECHO /* echo on for serial download */
115 * Command line configuration.
119 * Miscellaneous configurable options
121 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
124 * For booting Linux, the board info and command line data
125 * have to be in the first 64 MB of memory, since this is
126 * the maximum mapped by the Linux kernel during initialization.
128 #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/
129 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
132 * Environment Configuration
134 #define CONFIG_ROOTPATH "/opt/nfsroot"
135 #define CONFIG_BOOTFILE "uImage"
136 #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
138 /* default location for tftp and bootm */
139 #define CONFIG_LOADADDR 1000000
141 #define CONFIG_BOOTCOMMAND \
142 "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0"
144 #endif /* __QEMU_PPCE500_H */