2 * Copyright (c) 2017 Tuomas Tynkkynen
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <linux/sizes.h>
12 /* Physical memory map */
13 #define CONFIG_SYS_TEXT_BASE 0x00000000
15 #define CONFIG_NR_DRAM_BANKS 1
16 #define CONFIG_SYS_SDRAM_BASE 0x40000000
18 /* The DTB generated by QEMU is placed at start of RAM, stay away from there */
19 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
20 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
21 #define CONFIG_SYS_MALLOC_LEN SZ_16M
23 /* QEMU's PL011 serial port is detected via FDT using the device model */
24 #define CONFIG_PL01X_SERIAL
26 /* QEMU implements a 62.5MHz architected timer */
27 /* FIXME: can we rely on CNTFREQ instead of hardcoding this fact here? */
28 #define CONFIG_SYS_ARCH_TIMER
29 #define CONFIG_SYS_HZ 1000
30 #define CONFIG_SYS_HZ_CLOCK 62500000
32 /* For block devices, QEMU emulates an ICH9 AHCI controller over PCI */
33 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 6
34 #define CONFIG_SCSI_AHCI
37 /* Environment options */
38 #define CONFIG_ENV_SIZE SZ_64K
40 #include <config_distro_defaults.h>
42 #define BOOT_TARGET_DEVICES(func) \
45 #include <config_distro_bootcmd.h>
47 #define CONFIG_PREBOOT "pci enum"
48 #define CONFIG_EXTRA_ENV_SETTINGS \
49 "fdt_high=0xffffffff\0" \
50 "initrd_high=0xffffffff\0" \
51 "fdt_addr=0x40000000\0" \
52 "scriptaddr=0x40200000\0" \
53 "pxefile_addr_r=0x40300000\0" \
54 "kernel_addr_r=0x40400000\0" \
55 "ramdisk_addr_r=0x44000000\0" \
58 #endif /* __CONFIG_H */