1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
6 #ifndef __CONFIG_PX30_COMMON_H
7 #define __CONFIG_PX30_COMMON_H
9 #include "rockchip-common.h"
11 #define CONFIG_SYS_NS16550_MEM32
13 /* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */
14 #define CONFIG_IRAM_BASE 0xff020000
16 #define CONFIG_SYS_INIT_SP_ADDR 0x00400000
17 #define CONFIG_SPL_STACK 0x00400000
18 #define CONFIG_SPL_MAX_SIZE 0x20000
19 #define CONFIG_SPL_BSS_START_ADDR 0x4000000
20 #define CONFIG_SPL_BSS_MAX_SIZE 0x4000
21 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
23 #define GICD_BASE 0xff131000
24 #define GICC_BASE 0xff132000
26 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
28 #define CONFIG_SYS_SDRAM_BASE 0
29 #define SDRAM_MAX_SIZE 0xff000000
30 #define SDRAM_BANK_SIZE (2UL << 30)
32 #ifndef CONFIG_SPL_BUILD
34 #define ENV_MEM_LAYOUT_SETTINGS \
35 "scriptaddr=0x00500000\0" \
36 "pxefile_addr_r=0x00600000\0" \
37 "fdt_addr_r=0x08300000\0" \
38 "kernel_addr_r=0x00280000\0" \
39 "kernel_addr_c=0x03e80000\0" \
40 "ramdisk_addr_r=0x0a200000\0"
42 #include <config_distro_bootcmd.h>
43 #define CONFIG_EXTRA_ENV_SETTINGS \
44 ENV_MEM_LAYOUT_SETTINGS \
45 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
46 "partitions=" PARTS_DEFAULT \
47 ROCKCHIP_DEVICE_SETTINGS \