1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
6 #ifndef __CONFIG_PX30_COMMON_H
7 #define __CONFIG_PX30_COMMON_H
9 #include "rockchip-common.h"
11 #define CFG_IRAM_BASE 0xff0e0000
13 #define GICD_BASE 0xff131000
14 #define GICC_BASE 0xff132000
16 #define CFG_SYS_SDRAM_BASE 0
17 #define SDRAM_MAX_SIZE 0xff000000
19 #define ENV_MEM_LAYOUT_SETTINGS \
20 "scriptaddr=0x00500000\0" \
21 "pxefile_addr_r=0x00600000\0" \
22 "fdt_addr_r=0x08300000\0" \
23 "kernel_addr_r=0x00280000\0" \
24 "ramdisk_addr_r=0x0a200000\0" \
25 "kernel_comp_addr_r=0x03e80000\0" \
26 "kernel_comp_size=0x2000000\0"
28 #define CFG_EXTRA_ENV_SETTINGS \
29 ENV_MEM_LAYOUT_SETTINGS \
30 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
31 "partitions=" PARTS_DEFAULT \
32 ROCKCHIP_DEVICE_SETTINGS \
33 "boot_targets=" BOOT_TARGETS "\0"