Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'
[platform/kernel/u-boot.git] / include / configs / pm9g45.h
1 /*
2  * (C) Copyright 2010
3  * Ilko Iliev <iliev@ronetix.at>
4  * Asen Dimov <dimov@ronetix.at>
5  * Ronetix GmbH <www.ronetix.at>
6  *
7  * (C) Copyright 2007-2008
8  * Stelian Pop <stelian@popies.net>
9  * Lead Tech Design <www.leadtechdesign.com>
10  *
11  * Configuation settings for the PM9G45 board.
12  *
13  * SPDX-License-Identifier:     GPL-2.0+
14  */
15
16 #ifndef __CONFIG_H
17 #define __CONFIG_H
18
19 /*
20  * SoC must be defined first, before hardware.h is included.
21  * In this case SoC is defined in boards.cfg.
22  */
23 #include <asm/hardware.h>
24
25 #define CONFIG_PM9G45           1       /* It's an Ronetix PM9G45 */
26 #define CONFIG_SYS_AT91_CPU_NAME        "AT91SAM9G45"
27
28 #define MACH_TYPE_PM9G45        2672
29 #define CONFIG_MACH_TYPE        MACH_TYPE_PM9G45
30
31 /* ARM asynchronous clock */
32 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
33 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768           /* slow clock xtal */
34 #define CONFIG_SYS_HZ                   1000
35 #define CONFIG_SYS_TEXT_BASE            0x73f00000
36
37 #define CONFIG_ARCH_CPU_INIT
38
39 #define CONFIG_CMDLINE_TAG      1       /* enable passing of ATAGs */
40 #define CONFIG_SETUP_MEMORY_TAGS 1
41 #define CONFIG_INITRD_TAG       1
42
43 #define CONFIG_SKIP_LOWLEVEL_INIT
44 #define CONFIG_BOARD_EARLY_INIT_F
45
46 /*
47  * Hardware drivers
48  */
49 #define CONFIG_AT91_GPIO        1
50 #define CONFIG_ATMEL_USART      1
51 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
52 #define CONFIG_USART_ID                 ATMEL_ID_SYS
53
54 #define CONFIG_SYS_USE_NANDFLASH        1
55
56 /* LED */
57 #define CONFIG_AT91_LED
58 #define CONFIG_RED_LED          AT91_PIO_PORTD, 31 /* this is the user1 led */
59 #define CONFIG_GREEN_LED        AT91_PIO_PORTD, 0 /* this is the user2 led */
60
61 #define CONFIG_BOOTDELAY        3
62
63 /*
64  * BOOTP options
65  */
66 #define CONFIG_BOOTP_BOOTFILESIZE       1
67 #define CONFIG_BOOTP_BOOTPATH           1
68 #define CONFIG_BOOTP_GATEWAY            1
69 #define CONFIG_BOOTP_HOSTNAME           1
70
71 /*
72  * Command line configuration.
73  */
74 #include <config_cmd_default.h>
75 #undef CONFIG_CMD_FPGA
76 #undef CONFIG_CMD_IMLS
77
78 #define CONFIG_CMD_CACHE
79 #define CONFIG_CMD_PING         1
80 #define CONFIG_CMD_DHCP         1
81 #define CONFIG_CMD_NAND         1
82 #define CONFIG_CMD_USB          1
83
84 #define CONFIG_CMD_JFFS2                1
85 #define CONFIG_JFFS2_CMDLINE            1
86 #define CONFIG_JFFS2_NAND               1
87 #define CONFIG_JFFS2_DEV                "nand0" /* NAND dev jffs2 lives on */
88 #define CONFIG_JFFS2_PART_OFFSET        0       /* start of jffs2 partition */
89 #define CONFIG_JFFS2_PART_SIZE          (256 * 1024 * 1024) /* partition */
90
91 /* SDRAM */
92 #define CONFIG_NR_DRAM_BANKS            1
93 #define PHYS_SDRAM                      0x70000000
94 #define PHYS_SDRAM_SIZE                 0x08000000      /* 128 megs */
95
96 /* NOR flash, not available */
97 #define CONFIG_SYS_NO_FLASH             1
98 #undef CONFIG_CMD_FLASH
99
100 /* NAND flash */
101 #ifdef CONFIG_CMD_NAND
102 #define CONFIG_NAND_ATMEL
103 #define CONFIG_SYS_MAX_NAND_DEVICE      1
104 #define CONFIG_SYS_NAND_BASE            0x40000000
105 #define CONFIG_SYS_NAND_DBW_8           1
106 /* our ALE is AD21 */
107 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
108 /* our CLE is AD22 */
109 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
110 #define CONFIG_SYS_NAND_ENABLE_PIN      AT91_PIO_PORTC, 14
111 #define CONFIG_SYS_NAND_READY_PIN       AT91_PIO_PORTD, 3
112
113 #endif
114
115 /* Ethernet */
116 #define CONFIG_MACB                     1
117 #define CONFIG_RMII                     1
118 #define CONFIG_NET_RETRY_COUNT          20
119 #define CONFIG_RESET_PHY_R              1
120
121 /* USB */
122 #define CONFIG_USB_ATMEL
123 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
124 #define CONFIG_USB_OHCI_NEW             1
125 #define CONFIG_DOS_PARTITION            1
126 #define CONFIG_SYS_USB_OHCI_CPU_INIT    1
127 #define CONFIG_SYS_USB_OHCI_REGS_BASE   0x00700000 /* _UHP_OHCI_BASE */
128 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "at91sam9g45"
129 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
130 #define CONFIG_USB_STORAGE              1
131
132 /* board specific(not enough SRAM) */
133 #define CONFIG_AT91SAM9G45_LCD_BASE     PHYS_SDRAM + 0xE00000
134
135 #define CONFIG_SYS_LOAD_ADDR            PHYS_SDRAM + 0x2000000 /* load addr */
136
137 #define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM
138 #define CONFIG_SYS_MEMTEST_END          CONFIG_AT91SAM9G45_LCD_BASE
139
140 /* bootstrap + u-boot + env + linux in nandflash */
141 #define CONFIG_ENV_IS_IN_NAND           1
142 #define CONFIG_ENV_OFFSET               0x60000
143 #define CONFIG_ENV_OFFSET_REDUND        0x80000
144 #define CONFIG_ENV_SIZE                 0x20000         /* 1 sector = 128 kB */
145 #define CONFIG_BOOTCOMMAND      "nand read 0x72000000 0x200000 0x200000; bootm"
146 #define CONFIG_BOOTARGS         "fbcon=rotate:3 console=tty0 " \
147                                 "console=ttyS0,115200 " \
148                                 "root=/dev/mtdblock4 " \
149                                 "mtdparts=atmel_nand:128k(bootstrap)ro," \
150                                 "256k(uboot)ro,1664k(env)," \
151                                 "2M(linux)ro,-(root) rw " \
152                                 "rootfstype=jffs2"
153
154 #define CONFIG_BAUDRATE                 115200
155
156 #define CONFIG_SYS_PROMPT               "U-Boot> "
157 #define CONFIG_SYS_CBSIZE               256
158 #define CONFIG_SYS_MAXARGS              16
159 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
160                                         sizeof(CONFIG_SYS_PROMPT) + 16)
161 #define CONFIG_SYS_LONGHELP             1
162 #define CONFIG_CMDLINE_EDITING          1
163 #define CONFIG_AUTO_COMPLETE
164 #define CONFIG_SYS_HUSH_PARSER
165
166 /*
167  * Size of malloc() pool
168  */
169 #define CONFIG_SYS_MALLOC_LEN           ROUND(3 * CONFIG_ENV_SIZE + 128*1024,\
170                                         0x1000)
171
172 #define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM
173 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
174                                 GENERATED_GBL_DATA_SIZE)
175
176 #endif