1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Ilko Iliev <iliev@ronetix.at>
5 * Asen Dimov <dimov@ronetix.at>
6 * Ronetix GmbH <www.ronetix.at>
8 * (C) Copyright 2007-2008
9 * Stelian Pop <stelian@popies.net>
10 * Lead Tech Design <www.leadtechdesign.com>
12 * Configuation settings for the PM9G45 board.
18 /* ARM asynchronous clock */
19 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
20 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
22 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
23 #define CONFIG_SETUP_MEMORY_TAGS
24 #define CONFIG_INITRD_TAG
26 /* general purpose I/O */
27 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
32 #define CONFIG_BOOTP_BOOTFILESIZE
35 #define CONFIG_SYS_SDRAM_BASE 0x70000000
36 #define CONFIG_SYS_SDRAM_SIZE 0x08000000
38 #define CONFIG_SYS_INIT_SP_ADDR \
39 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
42 #ifdef CONFIG_CMD_NAND
43 #define CONFIG_SYS_MAX_NAND_DEVICE 1
44 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
45 #define CONFIG_SYS_NAND_DBW_8
47 #define CONFIG_SYS_NAND_MASK_ALE BIT(21)
49 #define CONFIG_SYS_NAND_MASK_CLE BIT(22)
50 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
51 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD3
52 #define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
56 #define CONFIG_RESET_PHY_R
57 #define CONFIG_AT91_WANTS_COMMON_PHY
59 #ifdef CONFIG_NAND_BOOT
60 /* bootstrap + u-boot + env in nandflash */
62 #define CONFIG_BOOTCOMMAND \
63 "nand read 0x70000000 0x200000 0x300000;" \
66 /* bootstrap + u-boot + env + linux in mmc */
68 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x71000000 dtb; " \
69 "fatload mmc 0:1 0x72000000 zImage; " \
70 "bootz 0x72000000 - 0x71000000"
74 #define CONFIG_SPL_MAX_SIZE 0x010000
75 #define CONFIG_SPL_STACK 0x310000
77 #define CONFIG_SYS_MONITOR_LEN 0x80000
81 #define CONFIG_SPL_BSS_START_ADDR 0x70000000
82 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000
83 #define CONFIG_SYS_SPL_MALLOC_START 0x70080000
84 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
86 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
88 #elif CONFIG_NAND_BOOT
89 #define CONFIG_SPL_NAND_SOFTECC
90 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
91 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
92 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
94 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800
95 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
96 #define CONFIG_SYS_NAND_PAGE_COUNT 64
97 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
98 #define CONFIG_SYS_NAND_ECCSIZE 256
99 #define CONFIG_SYS_NAND_ECCBYTES 3
100 #define CONFIG_SYS_NAND_OOBSIZE 64
101 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
102 48, 49, 50, 51, 52, 53, 54, 55, \
103 56, 57, 58, 59, 60, 61, 62, 63, }
106 #define CONFIG_SPL_ATMEL_SIZE
107 #define CONFIG_SYS_MASTER_CLOCK 132096000
108 #define CONFIG_SYS_AT91_PLLA 0x20c73f03
109 #define CONFIG_SYS_MCKR 0x1301
110 #define CONFIG_SYS_MCKR_CSS 0x1302