include/configs: Remove rootwait=1 to all the affected boards
[platform/kernel/u-boot.git] / include / configs / pm9g45.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2010
4  * Ilko Iliev <iliev@ronetix.at>
5  * Asen Dimov <dimov@ronetix.at>
6  * Ronetix GmbH <www.ronetix.at>
7  *
8  * (C) Copyright 2007-2008
9  * Stelian Pop <stelian@popies.net>
10  * Lead Tech Design <www.leadtechdesign.com>
11  *
12  * Configuation settings for the PM9G45 board.
13  */
14
15 #ifndef __CONFIG_H
16 #define __CONFIG_H
17
18 /* ARM asynchronous clock */
19 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
20 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
21
22 /* SDRAM */
23 #define CONFIG_SYS_SDRAM_BASE           0x70000000
24 #define CONFIG_SYS_SDRAM_SIZE           0x08000000
25
26 /* NAND flash */
27 #ifdef CONFIG_CMD_NAND
28 #define CONFIG_SYS_MAX_NAND_DEVICE              1
29 #define CONFIG_SYS_NAND_BASE                    ATMEL_BASE_CS3
30 #define CONFIG_SYS_NAND_DBW_8
31 /* our ALE is AD21 */
32 #define CONFIG_SYS_NAND_MASK_ALE                BIT(21)
33 /* our CLE is AD22 */
34 #define CONFIG_SYS_NAND_MASK_CLE                BIT(22)
35 #define CONFIG_SYS_NAND_ENABLE_PIN              AT91_PIN_PC14
36 #define CONFIG_SYS_NAND_READY_PIN               AT91_PIN_PD3
37 #endif
38
39 #ifdef CONFIG_NAND_BOOT
40 /* bootstrap + u-boot + env in nandflash */
41 #elif CONFIG_SD_BOOT
42 /* bootstrap + u-boot + env + linux in mmc */
43 #endif
44
45 /* Defines for SPL */
46
47 #define CONFIG_SYS_MONITOR_LEN          0x80000
48
49 #ifdef CONFIG_SD_BOOT
50 #elif CONFIG_NAND_BOOT
51 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x80000
52
53 #define CONFIG_SYS_NAND_ECCSIZE         256
54 #define CONFIG_SYS_NAND_ECCBYTES        3
55 #define CONFIG_SYS_NAND_ECCPOS          { 40, 41, 42, 43, 44, 45, 46, 47, \
56                                           48, 49, 50, 51, 52, 53, 54, 55, \
57                                           56, 57, 58, 59, 60, 61, 62, 63, }
58 #endif
59
60 #define CONFIG_SYS_MASTER_CLOCK         132096000
61 #define CONFIG_SYS_AT91_PLLA            0x20c73f03
62 #define CONFIG_SYS_MCKR                 0x1301
63 #define CONFIG_SYS_MCKR_CSS             0x1302
64
65 #endif