1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Ilko Iliev <iliev@ronetix.at>
5 * Asen Dimov <dimov@ronetix.at>
6 * Ronetix GmbH <www.ronetix.at>
8 * (C) Copyright 2007-2008
9 * Stelian Pop <stelian@popies.net>
10 * Lead Tech Design <www.leadtechdesign.com>
12 * Configuation settings for the PM9G45 board.
18 /* ARM asynchronous clock */
19 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
20 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
23 #define CONFIG_SYS_SDRAM_BASE 0x70000000
24 #define CONFIG_SYS_SDRAM_SIZE 0x08000000
27 #ifdef CONFIG_CMD_NAND
28 #define CONFIG_SYS_MAX_NAND_DEVICE 1
29 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
30 #define CONFIG_SYS_NAND_DBW_8
32 #define CONFIG_SYS_NAND_MASK_ALE BIT(21)
34 #define CONFIG_SYS_NAND_MASK_CLE BIT(22)
35 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
36 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD3
39 #ifdef CONFIG_NAND_BOOT
40 /* bootstrap + u-boot + env in nandflash */
42 /* bootstrap + u-boot + env + linux in mmc */
47 #define CONFIG_SYS_MONITOR_LEN 0x80000
50 #elif CONFIG_NAND_BOOT
51 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
53 #define CONFIG_SYS_NAND_ECCSIZE 256
54 #define CONFIG_SYS_NAND_ECCBYTES 3
55 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
56 48, 49, 50, 51, 52, 53, 54, 55, \
57 56, 57, 58, 59, 60, 61, 62, 63, }
60 #define CONFIG_SYS_MASTER_CLOCK 132096000
61 #define CONFIG_SYS_AT91_PLLA 0x20c73f03
62 #define CONFIG_SYS_MCKR 0x1301
63 #define CONFIG_SYS_MCKR_CSS 0x1302