1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Ilko Iliev <iliev@ronetix.at>
5 * Asen Dimov <dimov@ronetix.at>
6 * Ronetix GmbH <www.ronetix.at>
8 * (C) Copyright 2007-2008
9 * Stelian Pop <stelian@popies.net>
10 * Lead Tech Design <www.leadtechdesign.com>
12 * Configuation settings for the PM9G45 board.
18 /* ARM asynchronous clock */
19 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
20 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
22 /* general purpose I/O */
23 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
26 #define CONFIG_SYS_SDRAM_BASE 0x70000000
27 #define CONFIG_SYS_SDRAM_SIZE 0x08000000
29 #define CONFIG_SYS_INIT_SP_ADDR \
30 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
33 #ifdef CONFIG_CMD_NAND
34 #define CONFIG_SYS_MAX_NAND_DEVICE 1
35 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
36 #define CONFIG_SYS_NAND_DBW_8
38 #define CONFIG_SYS_NAND_MASK_ALE BIT(21)
40 #define CONFIG_SYS_NAND_MASK_CLE BIT(22)
41 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
42 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD3
46 #define CONFIG_RESET_PHY_R
47 #define CONFIG_AT91_WANTS_COMMON_PHY
49 #ifdef CONFIG_NAND_BOOT
50 /* bootstrap + u-boot + env in nandflash */
52 /* bootstrap + u-boot + env + linux in mmc */
56 #define CONFIG_SPL_MAX_SIZE 0x010000
57 #define CONFIG_SPL_STACK 0x310000
59 #define CONFIG_SYS_MONITOR_LEN 0x80000
63 #define CONFIG_SPL_BSS_START_ADDR 0x70000000
64 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000
65 #define CONFIG_SYS_SPL_MALLOC_START 0x70080000
66 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
68 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
70 #elif CONFIG_NAND_BOOT
71 #define CONFIG_SPL_NAND_SOFTECC
72 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
74 #define CONFIG_SYS_NAND_ECCSIZE 256
75 #define CONFIG_SYS_NAND_ECCBYTES 3
76 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
77 48, 49, 50, 51, 52, 53, 54, 55, \
78 56, 57, 58, 59, 60, 61, 62, 63, }
81 #define CONFIG_SPL_ATMEL_SIZE
82 #define CONFIG_SYS_MASTER_CLOCK 132096000
83 #define CONFIG_SYS_AT91_PLLA 0x20c73f03
84 #define CONFIG_SYS_MCKR 0x1301
85 #define CONFIG_SYS_MCKR_CSS 0x1302