1 /* SPDX-License-Identifier: GPL-2.0+ */
6 #ifndef __IMX8M_PICOPI_H
7 #define __IMX8M_PICOPI_H
9 #include <linux/sizes.h>
10 #include <asm/arch/imx-regs.h>
12 #define CONFIG_SPL_MAX_SIZE (124 * 1024)
13 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
15 #ifdef CONFIG_SPL_BUILD
16 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
17 #define CONFIG_SPL_STACK 0x187FF0
18 #define CONFIG_SPL_BSS_START_ADDR 0x00180000
19 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
20 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
21 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
22 #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
24 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
25 #define CONFIG_MALLOC_F_ADDR 0x182000
26 /* For RAW image gives a error info not panic */
27 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
32 #if defined(CONFIG_CMD_NET)
33 #define CONFIG_FEC_MXC_PHYADDR 1
34 #define FEC_QUIRK_ENET_MAC
37 /* Initial environment variables */
38 #define CONFIG_EXTRA_ENV_SETTINGS \
41 "console=ttymxc0,115200\0" \
42 "fdt_addr=0x43000000\0" \
43 "fdt_high=0xffffffffffffffff\0" \
44 "fdt_file=imx8mq-pico-pi.dtb\0" \
45 "initrd_addr=0x43800000\0" \
46 "initrd_high=0xffffffffffffffff\0" \
47 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
49 "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
50 "mmcautodetect=yes\0" \
51 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
53 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
54 "bootscript=echo Running bootscript from mmc ...; source\0" \
55 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
56 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
57 "mmcboot=echo Booting from mmc ...; " \
59 "echo wait for boot; " \
61 "netargs=setenv bootargs console=${console} " \
63 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
64 "netboot=echo Booting from net ...; " \
66 "if test ${ip_dyn} = yes; then " \
67 "setenv get_cmd dhcp; " \
69 "setenv get_cmd tftp; " \
71 "${get_cmd} ${loadaddr} ${image}; " \
74 /* Link Definitions */
76 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
77 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
78 #define CONFIG_SYS_INIT_SP_OFFSET \
79 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
80 #define CONFIG_SYS_INIT_SP_ADDR \
81 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
84 #define CONFIG_SYS_SDRAM_BASE 0x40000000
85 #define PHYS_SDRAM 0x40000000
86 #define PHYS_SDRAM_SIZE 0x80000000 /* 2 GiB DDR */
88 #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
90 /* Monitor Command Prompt */
91 #define CONFIG_SYS_CBSIZE 1024
92 #define CONFIG_SYS_MAXARGS 64
93 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
94 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
95 sizeof(CONFIG_SYS_PROMPT) + 16)
97 #define CONFIG_SYS_FSL_USDHC_NUM 2
98 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
100 #define CONFIG_SYS_BOOTM_LEN SZ_128M