2 * Copyright (C) Stefano Babic <sbabic@denx.de>
4 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __PCM058_CONFIG_H
9 #define __PCM058_CONFIG_H
11 #include <config_distro_defaults.h>
14 #define CONFIG_SPL_LIBCOMMON_SUPPORT
15 #define CONFIG_SPL_YMODEM_SUPPORT
16 #define CONFIG_SPL_MMC_SUPPORT
17 #define CONFIG_SPL_SPI_SUPPORT
18 #define CONFIG_SPL_SPI_FLASH_SUPPORT
19 #define CONFIG_SPL_SPI_LOAD
20 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
24 #include "mx6_common.h"
27 #define CONFIG_IMX_THERMAL
30 #define CONFIG_MXC_UART
31 #define CONFIG_MXC_UART_BASE UART2_BASE
32 #define CONFIG_CONSOLE_DEV "ttymxc1"
34 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
37 #define CONFIG_BOARD_EARLY_INIT_F
38 #define CONFIG_BOARD_LATE_INIT
39 #define CONFIG_DISPLAY_BOARDINFO_LATE
42 /* Size of malloc() pool */
43 #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
46 #define CONFIG_FEC_MXC
48 #define IMX_FEC_BASE ENET_BASE_ADDR
49 #define CONFIG_FEC_XCV_TYPE RGMII
50 #define CONFIG_ETHPRIME "FEC"
51 #define CONFIG_FEC_MXC_PHYADDR 3
54 #define CONFIG_PHY_MICREL
55 #define CONFIG_PHY_KSZ9031
58 #define CONFIG_MXC_SPI
59 #define CONFIG_SF_DEFAULT_BUS 0
60 #define CONFIG_SF_DEFAULT_CS 0
61 #define CONFIG_SF_DEFAULT_SPEED 20000000
62 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
65 #define CONFIG_SYS_I2C
66 #define CONFIG_SYS_I2C_MXC
67 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */
68 #define CONFIG_SYS_I2C_SPEED 100000
70 #ifndef CONFIG_SPL_BUILD
71 #define CONFIG_CMD_NAND
72 /* Enable NAND support */
73 #define CONFIG_CMD_NAND_TRIMFFS
74 #define CONFIG_NAND_MXS
75 #define CONFIG_SYS_MAX_NAND_DEVICE 1
76 #define CONFIG_SYS_NAND_BASE 0x40000000
77 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
78 #define CONFIG_SYS_NAND_ONFI_DETECTION
81 /* DMA stuff, needed for GPMI/MXS NAND support */
82 #define CONFIG_APBH_DMA
83 #define CONFIG_APBH_DMA_BURST
84 #define CONFIG_APBH_DMA_BURST8
86 /* Filesystem support */
88 #define CONFIG_CMD_UBIFS
89 #define CONFIG_CMD_MTDPARTS
90 #define CONFIG_MTD_PARTITIONS
91 #define CONFIG_MTD_DEVICE
92 #define MTDIDS_DEFAULT "nand0=nand"
93 #define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
95 /* Various command support */
96 #define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */
97 #define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
98 #define CONFIG_CMD_GSC
99 #define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
100 #define CONFIG_CMD_UBI
101 #define CONFIG_RBTREE
103 /* Physical Memory Map */
104 #define CONFIG_NR_DRAM_BANKS 1
105 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
107 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
108 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
109 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
111 #define CONFIG_SYS_INIT_SP_OFFSET \
112 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
113 #define CONFIG_SYS_INIT_SP_ADDR \
114 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
117 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
118 #define CONFIG_SYS_FSL_USDHC_NUM 1
120 /* Environment organization */
121 #define CONFIG_ENV_IS_IN_SPI_FLASH
122 #define CONFIG_ENV_SIZE (16 * 1024)
123 #define CONFIG_ENV_OFFSET (1024 * SZ_1K)
124 #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
125 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
126 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
127 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
128 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
129 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
130 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
131 CONFIG_ENV_SECT_SIZE)
132 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
134 #ifdef CONFIG_ENV_IS_IN_NAND
135 #define CONFIG_ENV_OFFSET (0x1E0000)
136 #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)