include/configs/pcm052.h

   1 /*
   2  * Copyright 2013 Freescale Semiconductor, Inc.
   3  *
   4  * Configuration settings for the phytec PCM-052 SoM.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #include <asm/arch/imx-regs.h>
  13
  14 #define CONFIG_VF610
  15
  16 #define CONFIG_SYS_THUMB_BUILD
  17
  18 #define CONFIG_SKIP_LOWLEVEL_INIT
  19
  20 /* Enable passing of ATAGs */
  21 #define CONFIG_CMDLINE_TAG
  22
  23 /* Size of malloc() pool */
  24 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
  25
  26 #define CONFIG_BOARD_EARLY_INIT_F
  27
  28 /* Allow to overwrite serial and ethaddr */
  29 #define CONFIG_ENV_OVERWRITE
  30 #define CONFIG_BAUDRATE                 115200
  31
  32 /* NAND support */
  33 #define CONFIG_CMD_NAND
  34 #define CONFIG_CMD_NAND_TRIMFFS
  35 #define CONFIG_SYS_NAND_ONFI_DETECTION
  36
  37 #ifdef CONFIG_CMD_NAND
  38 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  39 #define CONFIG_SYS_NAND_BASE            NFC_BASE_ADDR
  40
  41 #define CONFIG_JFFS2_NAND
  42
  43 /* UBI */
  44 #define CONFIG_CMD_UBIFS
  45 #define CONFIG_RBTREE
  46 #define CONFIG_LZO
  47
  48 /* Dynamic MTD partition support */
  49 #define CONFIG_CMD_MTDPARTS
  50 #define CONFIG_MTD_PARTITIONS
  51 #define CONFIG_MTD_DEVICE
  52
  53 #ifndef MTDIDS_DEFAULT
  54 #define MTDIDS_DEFAULT                  "nand0=NAND"
  55 #endif
  56
  57 #ifndef MTDPARTS_DEFAULT
  58 #define MTDPARTS_DEFAULT                "mtdparts=NAND:640k(bootloader)"\
  59                                         ",128k(env1)"\
  60                                         ",128k(env2)"\
  61                                         ",128k(dtb)"\
  62                                         ",6144k(kernel)"\
  63                                         ",-(root)"
  64 #endif
  65
  66 #endif
  67
  68 #define CONFIG_MMC
  69 #define CONFIG_FSL_ESDHC
  70 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  71 #define CONFIG_SYS_FSL_ESDHC_NUM        1
  72
  73 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
  74 #define CONFIG_SYS_FSL_ERRATUM_ESDHC135
  75 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
  76 #define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
  77
  78 #define CONFIG_GENERIC_MMC
  79 #define CONFIG_DOS_PARTITION
  80
  81 #define CONFIG_FEC_MXC
  82 #define CONFIG_MII
  83 #define IMX_FEC_BASE                    ENET_BASE_ADDR
  84 #define CONFIG_FEC_XCV_TYPE             RMII
  85 #define CONFIG_FEC_MXC_PHYADDR          0
  86 #define CONFIG_PHYLIB
  87 #define CONFIG_PHY_MICREL
  88
  89 /* QSPI Configs*/
  90
  91 #ifdef CONFIG_FSL_QSPI
  92 #define FSL_QSPI_FLASH_SIZE             (1 << 24)
  93 #define FSL_QSPI_FLASH_NUM              2
  94 #define CONFIG_SYS_FSL_QSPI_LE
  95 #endif
  96
  97 /* I2C Configs */
  98 #define CONFIG_SYS_I2C
  99 #define CONFIG_SYS_I2C_MXC_I2C3
 100 #define CONFIG_SYS_I2C_MXC
 101
 102 /* RTC (actually an RV-4162 but M41T62-compatible) */
 103 #define CONFIG_CMD_DATE
 104 #define CONFIG_RTC_M41T62
 105 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
 106 #define CONFIG_SYS_RTC_BUS_NUM 2
 107
 108 /* EEPROM (24FC256) */
 109 #define CONFIG_CMD_EEPROM
 110 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
 111 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
 112 #define CONFIG_SYS_I2C_EEPROM_BUS 2
 113
 114
 115 #define CONFIG_LOADADDR                 0x82000000
 116
 117 /* We boot from the gfxRAM area of the OCRAM. */
 118 #define CONFIG_SYS_TEXT_BASE            0x3f408000
 119 #define CONFIG_BOARD_SIZE_LIMIT         524288
 120
 121 /* if no target-specific extra environment settings were defined by the
 122    target, define an empty one */
 123 #ifndef PCM052_EXTRA_ENV_SETTINGS
 124 #define PCM052_EXTRA_ENV_SETTINGS
 125 #endif
 126
 127 /* if no target-specific boot command was defined by the target,
 128    define an empty one */
 129 #ifndef PCM052_BOOTCOMMAND
 130 #define PCM052_BOOTCOMMAND
 131 #endif
 132
 133 /* if no target-specific extra environment settings were defined by the
 134    target, define an empty one */
 135 #ifndef PCM052_NET_INIT
 136 #define PCM052_NET_INIT
 137 #endif
 138
 139 /* boot command, including the target-defined one if any */
 140 #define CONFIG_BOOTCOMMAND      PCM052_BOOTCOMMAND "run bootcmd_nand"
 141
 142 /* Extra env settings (including the target-defined ones if any) */
 143 #define CONFIG_EXTRA_ENV_SETTINGS \
 144         PCM052_EXTRA_ENV_SETTINGS \
 145         "autoload=no\0" \
 146         "fdt_high=0xffffffff\0" \
 147         "initrd_high=0xffffffff\0" \
 148         "blimg_file=u-boot.vyb\0" \
 149         "blimg_addr=0x81000000\0" \
 150         "kernel_file=zImage\0" \
 151         "kernel_addr=0x82000000\0" \
 152         "fdt_file=zImage.dtb\0" \
 153         "fdt_addr=0x81000000\0" \
 154         "ram_file=uRamdisk\0" \
 155         "ram_addr=0x83000000\0" \
 156         "filesys=rootfs.ubifs\0" \
 157         "sys_addr=0x81000000\0" \
 158         "tftploc=/path/to/tftp/directory/\0" \
 159         "nfs_root=/path/to/nfs/root\0" \
 160         "tftptimeout=1000\0" \
 161         "tftptimeoutcountmax=1000000\0" \
 162         "mtdparts=" MTDPARTS_DEFAULT "\0" \
 163         "bootargs_base=setenv bootargs rw " \
 164                 " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
 165                 "console=ttyLP1,115200n8\0" \
 166         "bootargs_sd=setenv bootargs ${bootargs} " \
 167                 "root=/dev/mmcblk0p2 rootwait\0" \
 168         "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
 169                 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
 170         "bootargs_nand=setenv bootargs ${bootargs} " \
 171                 "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
 172         "bootargs_ram=setenv bootargs ${bootargs} " \
 173                 "root=/dev/ram rw initrd=${ram_addr}\0" \
 174         "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
 175         "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
 176                 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
 177                 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
 178                 "bootz ${kernel_addr} - ${fdt_addr}\0" \
 179         "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
 180                 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
 181                 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
 182                 "bootz ${kernel_addr} - ${fdt_addr}\0" \
 183         "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
 184                 "nand read ${fdt_addr} dtb; " \
 185                 "nand read ${kernel_addr} kernel; " \
 186                 "bootz ${kernel_addr} - ${fdt_addr}\0" \
 187         "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
 188                 "nand read ${fdt_addr} dtb; " \
 189                 "nand read ${kernel_addr} kernel; " \
 190                 "nand read ${ram_addr} root; " \
 191                 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
 192         "update_bootloader_from_tftp=" PCM052_NET_INIT \
 193                 "if tftp ${blimg_addr} "\
 194                 "${tftpdir}${blimg_file}; then " \
 195                 "mtdparts default; " \
 196                 "nand erase.part bootloader; " \
 197                 "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
 198         "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
 199                 "${kernel_file}; " \
 200                 "then mtdparts default; " \
 201                 "nand erase.part kernel; " \
 202                 "nand write ${kernel_addr} kernel ${filesize}; " \
 203                 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
 204                 "nand erase.part dtb; " \
 205                 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \
 206         "update_kernel_from_tftp=" PCM052_NET_INIT \
 207                 "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
 208                 "then setenv fdtsize ${filesize}; " \
 209                 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
 210                 "mtdparts default; " \
 211                 "nand erase.part dtb; " \
 212                 "nand write ${fdt_addr} dtb ${fdtsize}; " \
 213                 "nand erase.part kernel; " \
 214                 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
 215         "update_rootfs_from_tftp=" PCM052_NET_INIT \
 216                 "if tftp ${sys_addr} ${tftpdir}${filesys}; " \
 217                 "then mtdparts default; " \
 218                 "nand erase.part root; " \
 219                 "ubi part root; " \
 220                 "ubi create rootfs; " \
 221                 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
 222         "update_ramdisk_from_tftp=" PCM052_NET_INIT \
 223                 "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
 224                 "then mtdparts default; " \
 225                 "nand erase.part root; " \
 226                 "nand write ${ram_addr} root ${filesize}; fi\0"
 227
 228 /* Miscellaneous configurable options */
 229 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 230 #define CONFIG_AUTO_COMPLETE
 231 #define CONFIG_CMDLINE_EDITING
 232 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 233 #define CONFIG_SYS_PBSIZE               \
 234                         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 235 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 236 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 237
 238 #define CONFIG_SYS_MEMTEST_START        0x80010000
 239 #define CONFIG_SYS_MEMTEST_END          0x87C00000
 240
 241 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 242
 243 /*
 244  * Stack sizes
 245  * The stack sizes are set up in start.S using the settings below
 246  */
 247 #define CONFIG_STACKSIZE                (128 * 1024)    /* regular stack */
 248
 249 /* Physical memory map */
 250 #define CONFIG_NR_DRAM_BANKS            1
 251 #define PHYS_SDRAM                      (0x80000000)
 252 #define PHYS_SDRAM_SIZE                 (CONFIG_PCM052_DDR_SIZE * 1024 * 1024)
 253
 254 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
 255 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 256 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 257
 258 #define CONFIG_SYS_INIT_SP_OFFSET \
 259         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 260 #define CONFIG_SYS_INIT_SP_ADDR \
 261         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 262
 263 /* FLASH and environment organization */
 264 #define CONFIG_SYS_NO_FLASH
 265
 266 #ifdef CONFIG_ENV_IS_IN_MMC
 267 #define CONFIG_ENV_SIZE                 (8 * 1024)
 268
 269 #define CONFIG_ENV_OFFSET               (12 * 64 * 1024)
 270 #define CONFIG_SYS_MMC_ENV_DEV          0
 271 #endif
 272
 273 #ifdef CONFIG_ENV_IS_IN_NAND
 274 #define CONFIG_ENV_SECT_SIZE            (128 * 1024)
 275 #define CONFIG_ENV_SIZE                 (8 * 1024)
 276 #define CONFIG_ENV_OFFSET               0xA0000
 277 #define CONFIG_ENV_SIZE_REDUND          (8 * 1024)
 278 #define CONFIG_ENV_OFFSET_REDUND        0xC0000
 279 #endif
 280
 281 #endif