2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * Configuration settings for the phytec PCM-052 SoM.
6 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/imx-regs.h>
16 #define CONFIG_SYS_THUMB_BUILD
18 #define CONFIG_SKIP_LOWLEVEL_INIT
20 /* Enable passing of ATAGs */
21 #define CONFIG_CMDLINE_TAG
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
26 #define CONFIG_BOARD_EARLY_INIT_F
28 /* Allow to overwrite serial and ethaddr */
29 #define CONFIG_ENV_OVERWRITE
30 #define CONFIG_BAUDRATE 115200
33 #define CONFIG_CMD_NAND
34 #define CONFIG_CMD_NAND_TRIMFFS
35 #define CONFIG_SYS_NAND_ONFI_DETECTION
37 #ifdef CONFIG_CMD_NAND
38 #define CONFIG_SYS_MAX_NAND_DEVICE 1
39 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
41 #define CONFIG_JFFS2_NAND
44 #define CONFIG_CMD_UBIFS
48 /* Dynamic MTD partition support */
49 #define CONFIG_CMD_MTDPARTS
50 #define CONFIG_MTD_PARTITIONS
51 #define CONFIG_MTD_DEVICE
53 #ifndef MTDIDS_DEFAULT
54 #define MTDIDS_DEFAULT "nand0=NAND"
57 #ifndef MTDPARTS_DEFAULT
58 #define MTDPARTS_DEFAULT "mtdparts=NAND:640k(bootloader)"\
68 #define CONFIG_FSL_ESDHC
69 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
70 #define CONFIG_SYS_FSL_ESDHC_NUM 1
72 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
74 #define CONFIG_GENERIC_MMC
75 #define CONFIG_DOS_PARTITION
77 #define CONFIG_FEC_MXC
79 #define IMX_FEC_BASE ENET_BASE_ADDR
80 #define CONFIG_FEC_XCV_TYPE RMII
81 #define CONFIG_FEC_MXC_PHYADDR 0
83 #define CONFIG_PHY_MICREL
87 #ifdef CONFIG_FSL_QSPI
88 #define FSL_QSPI_FLASH_SIZE (1 << 24)
89 #define FSL_QSPI_FLASH_NUM 2
90 #define CONFIG_SYS_FSL_QSPI_LE
94 #define CONFIG_SYS_I2C
95 #define CONFIG_SYS_I2C_MXC_I2C3
96 #define CONFIG_SYS_I2C_MXC
98 /* RTC (actually an RV-4162 but M41T62-compatible) */
99 #define CONFIG_CMD_DATE
100 #define CONFIG_RTC_M41T62
101 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
102 #define CONFIG_SYS_RTC_BUS_NUM 2
104 /* EEPROM (24FC256) */
105 #define CONFIG_CMD_EEPROM
106 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
107 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
108 #define CONFIG_SYS_I2C_EEPROM_BUS 2
111 #define CONFIG_LOADADDR 0x82000000
113 /* We boot from the gfxRAM area of the OCRAM. */
114 #define CONFIG_SYS_TEXT_BASE 0x3f408000
115 #define CONFIG_BOARD_SIZE_LIMIT 524288
117 /* if no target-specific extra environment settings were defined by the
118 target, define an empty one */
119 #ifndef PCM052_EXTRA_ENV_SETTINGS
120 #define PCM052_EXTRA_ENV_SETTINGS
123 /* if no target-specific boot command was defined by the target,
124 define an empty one */
125 #ifndef PCM052_BOOTCOMMAND
126 #define PCM052_BOOTCOMMAND
129 /* if no target-specific extra environment settings were defined by the
130 target, define an empty one */
131 #ifndef PCM052_NET_INIT
132 #define PCM052_NET_INIT
135 /* boot command, including the target-defined one if any */
136 #define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand"
138 /* Extra env settings (including the target-defined ones if any) */
139 #define CONFIG_EXTRA_ENV_SETTINGS \
140 PCM052_EXTRA_ENV_SETTINGS \
142 "fdt_high=0xffffffff\0" \
143 "initrd_high=0xffffffff\0" \
144 "blimg_file=u-boot.vyb\0" \
145 "blimg_addr=0x81000000\0" \
146 "kernel_file=zImage\0" \
147 "kernel_addr=0x82000000\0" \
148 "fdt_file=zImage.dtb\0" \
149 "fdt_addr=0x81000000\0" \
150 "ram_file=uRamdisk\0" \
151 "ram_addr=0x83000000\0" \
152 "filesys=rootfs.ubifs\0" \
153 "sys_addr=0x81000000\0" \
154 "tftploc=/path/to/tftp/directory/\0" \
155 "nfs_root=/path/to/nfs/root\0" \
156 "tftptimeout=1000\0" \
157 "tftptimeoutcountmax=1000000\0" \
158 "mtdparts=" MTDPARTS_DEFAULT "\0" \
159 "bootargs_base=setenv bootargs rw " \
160 " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
161 "console=ttyLP1,115200n8\0" \
162 "bootargs_sd=setenv bootargs ${bootargs} " \
163 "root=/dev/mmcblk0p2 rootwait\0" \
164 "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
165 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
166 "bootargs_nand=setenv bootargs ${bootargs} " \
167 "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
168 "bootargs_ram=setenv bootargs ${bootargs} " \
169 "root=/dev/ram rw initrd=${ram_addr}\0" \
170 "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
171 "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
172 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
173 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
174 "bootz ${kernel_addr} - ${fdt_addr}\0" \
175 "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
176 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
177 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
178 "bootz ${kernel_addr} - ${fdt_addr}\0" \
179 "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
180 "nand read ${fdt_addr} dtb; " \
181 "nand read ${kernel_addr} kernel; " \
182 "bootz ${kernel_addr} - ${fdt_addr}\0" \
183 "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
184 "nand read ${fdt_addr} dtb; " \
185 "nand read ${kernel_addr} kernel; " \
186 "nand read ${ram_addr} root; " \
187 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
188 "update_bootloader_from_tftp=" PCM052_NET_INIT \
189 "if tftp ${blimg_addr} "\
190 "${tftpdir}${blimg_file}; then " \
191 "mtdparts default; " \
192 "nand erase.part bootloader; " \
193 "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
194 "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
196 "then mtdparts default; " \
197 "nand erase.part kernel; " \
198 "nand write ${kernel_addr} kernel ${filesize}; " \
199 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
200 "nand erase.part dtb; " \
201 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \
202 "update_kernel_from_tftp=" PCM052_NET_INIT \
203 "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
204 "then setenv fdtsize ${filesize}; " \
205 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
206 "mtdparts default; " \
207 "nand erase.part dtb; " \
208 "nand write ${fdt_addr} dtb ${fdtsize}; " \
209 "nand erase.part kernel; " \
210 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
211 "update_rootfs_from_tftp=" PCM052_NET_INIT \
212 "if tftp ${sys_addr} ${tftpdir}${filesys}; " \
213 "then mtdparts default; " \
214 "nand erase.part root; " \
216 "ubi create rootfs; " \
217 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
218 "update_ramdisk_from_tftp=" PCM052_NET_INIT \
219 "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
220 "then mtdparts default; " \
221 "nand erase.part root; " \
222 "nand write ${ram_addr} root ${filesize}; fi\0"
224 /* Miscellaneous configurable options */
225 #define CONFIG_SYS_LONGHELP /* undef to save memory */
226 #define CONFIG_AUTO_COMPLETE
227 #define CONFIG_CMDLINE_EDITING
228 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
229 #define CONFIG_SYS_PBSIZE \
230 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
231 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
232 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
234 #define CONFIG_SYS_MEMTEST_START 0x80010000
235 #define CONFIG_SYS_MEMTEST_END 0x87C00000
237 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
241 * The stack sizes are set up in start.S using the settings below
243 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
245 /* Physical memory map */
246 #define CONFIG_NR_DRAM_BANKS 1
247 #define PHYS_SDRAM (0x80000000)
248 #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024)
250 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
251 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
252 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
254 #define CONFIG_SYS_INIT_SP_OFFSET \
255 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
256 #define CONFIG_SYS_INIT_SP_ADDR \
257 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
259 /* FLASH and environment organization */
260 #define CONFIG_SYS_NO_FLASH
262 #ifdef CONFIG_ENV_IS_IN_MMC
263 #define CONFIG_ENV_SIZE (8 * 1024)
265 #define CONFIG_ENV_OFFSET (12 * 64 * 1024)
266 #define CONFIG_SYS_MMC_ENV_DEV 0
269 #ifdef CONFIG_ENV_IS_IN_NAND
270 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
271 #define CONFIG_ENV_SIZE (8 * 1024)
272 #define CONFIG_ENV_OFFSET 0xA0000
273 #define CONFIG_ENV_SIZE_REDUND (8 * 1024)
274 #define CONFIG_ENV_OFFSET_REDUND 0xC0000