1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2013 Freescale Semiconductor, Inc.
5 * Configuration settings for the phytec PCM-052 SoM.
11 #include <asm/arch/imx-regs.h>
13 #define CONFIG_SKIP_LOWLEVEL_INIT
15 /* Enable passing of ATAGs */
16 #define CONFIG_CMDLINE_TAG
18 /* Size of malloc() pool */
19 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
21 /* Allow to overwrite serial and ethaddr */
22 #define CONFIG_ENV_OVERWRITE
25 #define CONFIG_SYS_NAND_ONFI_DETECTION
27 #ifdef CONFIG_CMD_NAND
28 #define CONFIG_SYS_MAX_NAND_DEVICE 1
29 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
31 #define CONFIG_JFFS2_NAND
33 /* Dynamic MTD partition support */
37 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
38 #define CONFIG_SYS_FSL_ESDHC_NUM 1
40 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
42 #define CONFIG_FEC_MXC
43 #define IMX_FEC_BASE ENET_BASE_ADDR
44 #define CONFIG_FEC_XCV_TYPE RMII
45 #define CONFIG_FEC_MXC_PHYADDR 0
49 #ifdef CONFIG_FSL_QSPI
50 #define FSL_QSPI_FLASH_SIZE (1 << 24)
51 #define FSL_QSPI_FLASH_NUM 2
52 #define CONFIG_SYS_FSL_QSPI_LE
56 #define CONFIG_SYS_I2C
57 #define CONFIG_SYS_I2C_MXC_I2C3
58 #define CONFIG_SYS_I2C_MXC
60 /* RTC (actually an RV-4162 but M41T62-compatible) */
61 #define CONFIG_RTC_M41T62
62 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
63 #define CONFIG_SYS_RTC_BUS_NUM 2
65 /* EEPROM (24FC256) */
66 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
67 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
68 #define CONFIG_SYS_I2C_EEPROM_BUS 2
71 #define CONFIG_LOADADDR 0x82000000
73 /* We boot from the gfxRAM area of the OCRAM. */
74 #define CONFIG_BOARD_SIZE_LIMIT 520192
76 /* if no target-specific extra environment settings were defined by the
77 target, define an empty one */
78 #ifndef PCM052_EXTRA_ENV_SETTINGS
79 #define PCM052_EXTRA_ENV_SETTINGS
82 /* if no target-specific boot command was defined by the target,
83 define an empty one */
84 #ifndef PCM052_BOOTCOMMAND
85 #define PCM052_BOOTCOMMAND
88 /* if no target-specific extra environment settings were defined by the
89 target, define an empty one */
90 #ifndef PCM052_NET_INIT
91 #define PCM052_NET_INIT
94 /* boot command, including the target-defined one if any */
95 #define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand"
97 /* Extra env settings (including the target-defined ones if any) */
98 #define CONFIG_EXTRA_ENV_SETTINGS \
99 PCM052_EXTRA_ENV_SETTINGS \
101 "fdt_high=0xffffffff\0" \
102 "initrd_high=0xffffffff\0" \
103 "blimg_file=u-boot.vyb\0" \
104 "blimg_addr=0x81000000\0" \
105 "kernel_file=zImage\0" \
106 "kernel_addr=0x82000000\0" \
107 "fdt_file=zImage.dtb\0" \
108 "fdt_addr=0x81000000\0" \
109 "ram_file=uRamdisk\0" \
110 "ram_addr=0x83000000\0" \
111 "filesys=rootfs.ubifs\0" \
112 "sys_addr=0x81000000\0" \
113 "tftploc=/path/to/tftp/directory/\0" \
114 "nfs_root=/path/to/nfs/root\0" \
115 "tftptimeout=1000\0" \
116 "tftptimeoutcountmax=1000000\0" \
117 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
118 "bootargs_base=setenv bootargs rw " \
119 " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
120 "console=ttyLP1,115200n8\0" \
121 "bootargs_sd=setenv bootargs ${bootargs} " \
122 "root=/dev/mmcblk0p2 rootwait\0" \
123 "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
124 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
125 "bootargs_nand=setenv bootargs ${bootargs} " \
126 "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
127 "bootargs_ram=setenv bootargs ${bootargs} " \
128 "root=/dev/ram rw initrd=${ram_addr}\0" \
129 "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
130 "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
131 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
132 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
133 "bootz ${kernel_addr} - ${fdt_addr}\0" \
134 "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
135 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
136 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
137 "bootz ${kernel_addr} - ${fdt_addr}\0" \
138 "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
139 "nand read ${fdt_addr} dtb; " \
140 "nand read ${kernel_addr} kernel; " \
141 "bootz ${kernel_addr} - ${fdt_addr}\0" \
142 "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
143 "nand read ${fdt_addr} dtb; " \
144 "nand read ${kernel_addr} kernel; " \
145 "nand read ${ram_addr} root; " \
146 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
147 "update_bootloader_from_tftp=" PCM052_NET_INIT \
148 "if tftp ${blimg_addr} "\
149 "${tftpdir}${blimg_file}; then " \
150 "mtdparts default; " \
151 "nand erase.part bootloader; " \
152 "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
153 "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
155 "then mtdparts default; " \
156 "nand erase.part kernel; " \
157 "nand write ${kernel_addr} kernel ${filesize}; " \
158 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
159 "nand erase.part dtb; " \
160 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \
161 "update_kernel_from_tftp=" PCM052_NET_INIT \
162 "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
163 "then setenv fdtsize ${filesize}; " \
164 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
165 "mtdparts default; " \
166 "nand erase.part dtb; " \
167 "nand write ${fdt_addr} dtb ${fdtsize}; " \
168 "nand erase.part kernel; " \
169 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
170 "update_rootfs_from_tftp=" PCM052_NET_INIT \
171 "if tftp ${sys_addr} ${tftpdir}${filesys}; " \
172 "then mtdparts default; " \
173 "nand erase.part root; " \
175 "ubi create rootfs; " \
176 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
177 "update_ramdisk_from_tftp=" PCM052_NET_INIT \
178 "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
179 "then mtdparts default; " \
180 "nand erase.part root; " \
181 "nand write ${ram_addr} root ${filesize}; fi\0"
183 /* Miscellaneous configurable options */
185 #define CONFIG_SYS_MEMTEST_START 0x80010000
186 #define CONFIG_SYS_MEMTEST_END 0x87C00000
188 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
190 /* Physical memory map */
191 #define PHYS_SDRAM (0x80000000)
192 #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024)
194 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
195 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
196 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
198 #define CONFIG_SYS_INIT_SP_OFFSET \
199 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
200 #define CONFIG_SYS_INIT_SP_ADDR \
201 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
203 /* environment organization */
204 #ifdef CONFIG_ENV_IS_IN_MMC
205 #define CONFIG_ENV_SIZE (8 * 1024)
207 #define CONFIG_ENV_OFFSET (12 * 64 * 1024)
208 #define CONFIG_SYS_MMC_ENV_DEV 0
211 #ifdef CONFIG_ENV_IS_IN_NAND
212 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
213 #define CONFIG_ENV_SIZE (8 * 1024)
214 #define CONFIG_ENV_OFFSET 0xA0000
215 #define CONFIG_ENV_SIZE_REDUND (8 * 1024)
216 #define CONFIG_ENV_OFFSET_REDUND 0xC0000