include/configs/pcl063_ull.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Board configuration file for Phytec phyBOARD-i.MX6ULL-Segin SBC
   4  * Copyright (C) 2019 Parthiban Nallathambi <parthitce@gmail.com>
   5  *
   6  * Based on include/configs/xpress.h:
   7  * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de>
   8  */
   9 #ifndef __PCL063_ULL_H
  10 #define __PCL063_ULL_H
  11
  12 #include <linux/sizes.h>
  13 #include "mx6_common.h"
  14
  15 /* SPL options */
  16 #include "imx6_spl.h"
  17
  18 #define CONFIG_SYS_FSL_USDHC_NUM        2
  19
  20 /* Size of malloc() pool */
  21 #define CONFIG_SYS_MALLOC_LEN           (16 * SZ_1M)
  22
  23 /* Environment settings */
  24
  25 /* Environment in SD */
  26 #define CONFIG_SYS_MMC_ENV_DEV          0
  27 #define CONFIG_SYS_MMC_ENV_PART         0
  28 #define MMC_ROOTFS_DEV          0
  29 #define MMC_ROOTFS_PART         2
  30
  31 /* Console configs */
  32 #define CONFIG_MXC_UART_BASE            UART1_BASE
  33
  34 /* MMC Configs */
  35
  36 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC2_BASE_ADDR
  37 #define CONFIG_SUPPORT_EMMC_BOOT
  38
  39 /* I2C configs */
  40 #ifdef CONFIG_CMD_I2C
  41 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
  42 #define CONFIG_SYS_I2C_SPEED            100000
  43 #endif
  44
  45 /* Miscellaneous configurable options */
  46 #define CONFIG_SYS_MEMTEST_START        0x80000000
  47 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x10000000)
  48
  49 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
  50 #define CONFIG_SYS_HZ                   1000
  51
  52 /* Physical Memory Map */
  53 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
  54 #define PHYS_SDRAM_SIZE                 SZ_256M
  55
  56 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
  57 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
  58 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
  59
  60 #define CONFIG_SYS_INIT_SP_OFFSET \
  61         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  62 #define CONFIG_SYS_INIT_SP_ADDR \
  63         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  64
  65 /* NAND */
  66 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  67 #define CONFIG_SYS_NAND_BASE            0x40000000
  68
  69 /* USB Configs */
  70 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  71 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
  72 #define CONFIG_MXC_USB_FLAGS            0
  73 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
  74
  75 #define CONFIG_IMX_THERMAL
  76
  77 #define ENV_MMC \
  78         "mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \
  79         "mmcpart=" __stringify(MMC_ROOTFS_PART) "\0" \
  80         "fitpart=1\0" \
  81         "bootdelay=3\0" \
  82         "silent=1\0" \
  83         "optargs=rw rootwait\0" \
  84         "mmcautodetect=yes\0" \
  85         "mmcrootfstype=ext4\0" \
  86         "mmcfit_name=fitImage\0" \
  87         "mmcloadfit=fatload mmc ${mmcdev}:${fitpart} ${fit_addr} " \
  88                     "${mmcfit_name}\0" \
  89         "mmcargs=setenv bootargs " \
  90                 "root=/dev/mmcblk${mmcdev}p${mmcpart} ${optargs} " \
  91                 "console=${console} rootfstype=${mmcrootfstype}\0" \
  92         "mmc_mmc_fit=run mmcloadfit;run mmcargs addcon; bootm ${fit_addr}\0" \
  93
  94 /* Default environment */
  95 #define CONFIG_EXTRA_ENV_SETTINGS \
  96         "fdt_high=0xffffffff\0" \
  97         "console=ttymxc0,115200n8\0" \
  98         "addcon=setenv bootargs ${bootargs} console=${console},${baudrate}\0" \
  99         "fit_addr=0x82000000\0" \
 100         ENV_MMC
 101
 102 #define CONFIG_BOOTCOMMAND              "run mmc_mmc_fit"
 103
 104 #define BOOT_TARGET_DEVICES(func) \
 105         func(MMC, mmc, 0) \
 106         func(MMC, mmc, 1) \
 107         func(DHCP, dhcp, na)
 108
 109 #include <config_distro_bootcmd.h>
 110
 111 #endif /* __PCL063_ULL_H */