include/configs/palmtc.h

   1 /*
   2  * Palm Tungsten|C configuration file
   3  *
   4  * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19  * MA 02111-1307 USA
  20  */
  21
  22 #ifndef __CONFIG_H
  23 #define __CONFIG_H
  24
  25 #include <asm/arch/pxa-regs.h>
  26
  27 /*
  28  * High Level Board Configuration Options
  29  */
  30 #define CONFIG_CPU_PXA25X                       1       /* Intel PXA255 CPU */
  31 #define CONFIG_PALMTC                   1       /* Palm Tungsten|C board */
  32
  33 /*
  34  * Environment settings
  35  */
  36 #define CONFIG_ENV_OVERWRITE
  37 #define CONFIG_SYS_MALLOC_LEN           (128*1024)
  38 #define CONFIG_SYS_TEXT_BASE    0x0
  39
  40 #define CONFIG_BOOTCOMMAND                                              \
  41         "if mmc init && fatload mmc 0 0xa0000000 uboot.script ; then "  \
  42                 "source 0xa0000000; "                                   \
  43         "else "                                                         \
  44                 "bootm 0x80000; "                                       \
  45         "fi; "
  46 #define CONFIG_BOOTARGS                                                 \
  47         "console=tty0 console=ttyS0,115200"
  48 #define CONFIG_TIMESTAMP
  49 #define CONFIG_BOOTDELAY                2       /* Autoboot delay */
  50 #define CONFIG_CMDLINE_TAG
  51 #define CONFIG_SETUP_MEMORY_TAGS
  52
  53 #define CONFIG_LZMA                     /* LZMA compression support */
  54
  55 /*
  56  * Serial Console Configuration
  57  * STUART - the lower serial port on Colibri board
  58  */
  59 #define CONFIG_PXA_SERIAL
  60 #define CONFIG_FFUART                   1
  61 #define CONFIG_BAUDRATE                 115200
  62
  63 /*
  64  * Bootloader Components Configuration
  65  */
  66 #include <config_cmd_default.h>
  67
  68 #undef  CONFIG_CMD_NET
  69 #undef  CONFIG_CMD_NFS
  70 #define CONFIG_CMD_ENV
  71 #define CONFIG_CMD_MMC
  72 #define CONFIG_LCD
  73
  74 /*
  75  * MMC Card Configuration
  76  */
  77 #ifdef  CONFIG_CMD_MMC
  78 #define CONFIG_MMC
  79 #define CONFIG_PXA_MMC
  80 #define CONFIG_SYS_MMC_BASE             0xF0000000
  81 #define CONFIG_CMD_FAT
  82 #define CONFIG_CMD_EXT2
  83 #define CONFIG_DOS_PARTITION
  84 #endif
  85
  86 /*
  87  * LCD
  88  */
  89 #ifdef  CONFIG_LCD
  90 #define CONFIG_ACX517AKN
  91 #define CONFIG_VIDEO_LOGO
  92 #define CONFIG_CMD_BMP
  93 #define CONFIG_SPLASH_SCREEN
  94 #define CONFIG_SPLASH_SCREEN_ALIGN
  95 #define CONFIG_VIDEO_BMP_GZIP
  96 #define CONFIG_VIDEO_BMP_RLE8
  97 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  (2 << 20)
  98 #endif
  99
 100 /*
 101  * KGDB
 102  */
 103 #ifdef  CONFIG_CMD_KGDB
 104 #define CONFIG_KGDB_BAUDRATE            230400  /* kgdb serial port speed */
 105 #define CONFIG_KGDB_SER_INDEX           2       /* which serial port to use */
 106 #endif
 107
 108 /*
 109  * HUSH Shell Configuration
 110  */
 111 #define CONFIG_SYS_HUSH_PARSER          1
 112
 113 #define CONFIG_SYS_LONGHELP
 114 #ifdef  CONFIG_SYS_HUSH_PARSER
 115 #define CONFIG_SYS_PROMPT               "$ "
 116 #else
 117 #define CONFIG_SYS_PROMPT               "=> "
 118 #endif
 119 #define CONFIG_SYS_CBSIZE               256
 120 #define CONFIG_SYS_PBSIZE               \
 121         (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 122 #define CONFIG_SYS_MAXARGS              16
 123 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 124 #define CONFIG_SYS_DEVICE_NULLDEV       1
 125
 126 /*
 127  * Clock Configuration
 128  */
 129 #undef  CONFIG_SYS_CLKS_IN_HZ
 130 #define CONFIG_SYS_HZ                   3686400         /* Timer @ 3686400 Hz */
 131 #define CONFIG_SYS_CPUSPEED             0x161           /* 400MHz;L=1 M=3 T=1 */
 132
 133 /*
 134  * Stack sizes
 135  */
 136 #define CONFIG_STACKSIZE                (128*1024)      /* regular stack */
 137 #ifdef  CONFIG_USE_IRQ
 138 #define CONFIG_STACKSIZE_IRQ            (4*1024)        /* IRQ stack */
 139 #define CONFIG_STACKSIZE_FIQ            (4*1024)        /* FIQ stack */
 140 #endif
 141
 142 /*
 143  * DRAM Map
 144  */
 145 #define CONFIG_NR_DRAM_BANKS            1               /* 1 bank of DRAM */
 146 #define PHYS_SDRAM_1                    0xa0000000      /* SDRAM Bank #1 */
 147 #define PHYS_SDRAM_1_SIZE               0x04000000      /* 64 MB */
 148
 149 #define CONFIG_SYS_DRAM_BASE            0xa0000000      /* CS0 */
 150 #define CONFIG_SYS_DRAM_SIZE            0x04000000      /* 64 MB DRAM */
 151
 152 #define CONFIG_SYS_MEMTEST_START        0xa0400000      /* memtest works on */
 153 #define CONFIG_SYS_MEMTEST_END          0xa0800000      /* 4 ... 8 MB in DRAM */
 154
 155 #define CONFIG_SYS_LOAD_ADDR            CONFIG_SYS_DRAM_BASE
 156
 157 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 158 #define CONFIG_SYS_INIT_SP_ADDR         0xfffff800
 159
 160 /*
 161  * NOR FLASH
 162  */
 163 #ifdef  CONFIG_CMD_FLASH
 164 #define PHYS_FLASH_1                    0x00000000      /* Flash Bank #1 */
 165 #define PHYS_FLASH_SIZE                 0x01000000      /* 16 MB */
 166 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_1
 167
 168 #define CONFIG_SYS_FLASH_CFI
 169 #define CONFIG_FLASH_CFI_DRIVER         1
 170 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_32BIT
 171
 172 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 173 #define CONFIG_SYS_MAX_FLASH_SECT       64
 174
 175 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
 176
 177 #define CONFIG_SYS_FLASH_ERASE_TOUT     (2*CONFIG_SYS_HZ)
 178 #define CONFIG_SYS_FLASH_WRITE_TOUT     (2*CONFIG_SYS_HZ)
 179 #define CONFIG_SYS_FLASH_LOCK_TOUT      (2*CONFIG_SYS_HZ)
 180 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    (2*CONFIG_SYS_HZ)
 181 #define CONFIG_SYS_FLASH_PROTECTION
 182
 183 #define CONFIG_ENV_IS_IN_FLASH          1
 184 #define CONFIG_ENV_SECT_SIZE            0x40000
 185 #else
 186 #define CONFIG_SYS_NO_FLASH
 187 #define CONFIG_ENV_IS_NOWHERE
 188 #endif
 189
 190 #define CONFIG_SYS_MONITOR_BASE         0x0
 191 #define CONFIG_SYS_MONITOR_LEN          0x40000
 192
 193 #define CONFIG_ENV_SIZE                 0x4000
 194 #define CONFIG_ENV_ADDR                 0x40000
 195
 196 /*
 197  * GPIO settings
 198  */
 199 #define CONFIG_SYS_GAFR0_L_VAL  0x00011004
 200 #define CONFIG_SYS_GAFR0_U_VAL  0xa5000008
 201 #define CONFIG_SYS_GAFR1_L_VAL  0x60888050
 202 #define CONFIG_SYS_GAFR1_U_VAL  0xaaa50aaa
 203 #define CONFIG_SYS_GAFR2_L_VAL  0x0aaaaaaa
 204 #define CONFIG_SYS_GAFR2_U_VAL  0x00000000
 205 #define CONFIG_SYS_GPCR0_VAL    0x0
 206 #define CONFIG_SYS_GPCR1_VAL    0x0
 207 #define CONFIG_SYS_GPCR2_VAL    0x0
 208 #define CONFIG_SYS_GPDR0_VAL    0xcfff8140
 209 #define CONFIG_SYS_GPDR1_VAL    0xfcbfbef3
 210 #define CONFIG_SYS_GPDR2_VAL    0x0001ffff
 211 #define CONFIG_SYS_GPSR0_VAL    0x00010f8f
 212 #define CONFIG_SYS_GPSR1_VAL    0x00bf5de5
 213 #define CONFIG_SYS_GPSR2_VAL    0x03fe0800
 214
 215 #define CONFIG_SYS_PSSR_VAL     PSSR_RDH
 216
 217 /* Clock setup:
 218  * CKEN[1] - PWM1 ; CKEN[6] - FFUART
 219  * CKEN[12] - MMC ; CKEN[16] - LCD
 220  */
 221 #define CONFIG_SYS_CKEN         0x00011042
 222 #define CONFIG_SYS_CCCR         0x00000161
 223
 224 /*
 225  * Memory settings
 226  */
 227 #define CONFIG_SYS_MSC0_VAL     0x800092c2
 228 #define CONFIG_SYS_MSC1_VAL     0x80008000
 229 #define CONFIG_SYS_MSC2_VAL     0x80008000
 230 #define CONFIG_SYS_MDCNFG_VAL   0x00001ac9
 231 #define CONFIG_SYS_MDREFR_VAL   0x00118018
 232 #define CONFIG_SYS_MDMRS_VAL    0x00220032
 233 #define CONFIG_SYS_FLYCNFG_VAL  0x01fe01fe
 234 #define CONFIG_SYS_SXCNFG_VAL   0x00000000
 235
 236 /*
 237  * PCMCIA and CF Interfaces
 238  */
 239 #define CONFIG_SYS_MECR_VAL     0x00000000
 240 #define CONFIG_SYS_MCMEM0_VAL   0x00010504
 241 #define CONFIG_SYS_MCMEM1_VAL   0x00010504
 242 #define CONFIG_SYS_MCATT0_VAL   0x00010504
 243 #define CONFIG_SYS_MCATT1_VAL   0x00010504
 244 #define CONFIG_SYS_MCIO0_VAL    0x00010e04
 245 #define CONFIG_SYS_MCIO1_VAL    0x00010e04
 246
 247 #endif  /* __CONFIG_H */