include/configs/p2771-0000.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (c) 2013-2016, NVIDIA CORPORATION.
   4  */
   5
   6 #ifndef _P2771_0000_H
   7 #define _P2771_0000_H
   8
   9 #include <linux/sizes.h>
  10
  11 #include "tegra186-common.h"
  12
  13 /* High-level configuration options */
  14 #define CONFIG_TEGRA_BOARD_STRING       "NVIDIA P2771-0000"
  15
  16 /* Environment in eMMC, at the end of 2nd "boot sector" */
  17
  18 #define BOARD_EXTRA_ENV_SETTINGS \
  19         "calculated_vars=kernel_addr_r fdt_addr_r scriptaddr pxefile_addr_r " \
  20                 "ramdisk_addr_r\0" \
  21         "kernel_addr_r_align=00200000\0" \
  22         "kernel_addr_r_offset=00080000\0" \
  23         "kernel_addr_r_size=02000000\0" \
  24         "kernel_addr_r_aliases=loadaddr\0" \
  25         "fdt_addr_r_align=00200000\0" \
  26         "fdt_addr_r_offset=00000000\0" \
  27         "fdt_addr_r_size=00200000\0" \
  28         "scriptaddr_align=00200000\0" \
  29         "scriptaddr_offset=00000000\0" \
  30         "scriptaddr_size=00200000\0" \
  31         "pxefile_addr_r_align=00200000\0" \
  32         "pxefile_addr_r_offset=00000000\0" \
  33         "pxefile_addr_r_size=00200000\0" \
  34         "ramdisk_addr_r_align=00200000\0" \
  35         "ramdisk_addr_r_offset=00000000\0" \
  36         "ramdisk_addr_r_size=02000000\0"
  37
  38 #include "tegra-common-post.h"
  39
  40 /* Crystal is 38.4MHz. clk_m runs at half that rate */
  41 #define COUNTER_FREQUENCY       19200000
  42
  43 #endif