2 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
3 * Copyright (C) 2014 Bachmann electronic GmbH
5 * SPDX-License-Identifier: GPL-2.0+
11 #include "mx6_common.h"
13 #define CONFIG_CMDLINE_TAG
14 #define CONFIG_SETUP_MEMORY_TAGS
15 #define CONFIG_INITRD_TAG
16 #define CONFIG_REVISION_TAG
18 /* Size of malloc() pool */
19 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
21 #define CONFIG_BOARD_EARLY_INIT_F
22 #define CONFIG_MISC_INIT_R
23 #define CONFIG_MXC_GPIO
26 #define CONFIG_CMD_FUSE
27 #define CONFIG_MXC_OCOTP
30 #define CONFIG_MXC_UART
31 #define CONFIG_MXC_UART_BASE UART1_BASE
36 #define CONFIG_SPI_FLASH
37 #define CONFIG_SPI_FLASH_STMICRO
38 #define CONFIG_SPI_FLASH_WINBOND
39 #define CONFIG_SPI_FLASH_MACRONIX
40 #define CONFIG_SPI_FLASH_SST
41 #define CONFIG_MXC_SPI
42 #define CONFIG_SF_DEFAULT_BUS 2
43 #define CONFIG_SF_DEFAULT_CS 0
44 #define CONFIG_SF_DEFAULT_SPEED 25000000
45 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
48 #define CONFIG_PCA953X
49 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
50 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
51 #define CONFIG_CMD_PCA953X
52 #define CONFIG_CMD_PCA953X_INFO
55 #define CONFIG_CMD_I2C
56 #define CONFIG_SYS_I2C
57 #define CONFIG_SYS_I2C_MXC
58 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
59 #define CONFIG_SYS_I2C_SPEED 100000
62 #define CONFIG_CMD_IMXOTP
63 #define CONFIG_IMX_OTP
64 #define IMX_OTP_BASE OCOTP_BASE_ADDR
65 #define IMX_OTP_ADDR_MAX 0x7F
66 #define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
67 #define IMX_OTPWRITE_ENABLED
70 #define CONFIG_FSL_ESDHC
71 #define CONFIG_FSL_USDHC
72 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
73 #define CONFIG_SYS_FSL_USDHC_NUM 2
76 #define CONFIG_CMD_MMC
77 #define CONFIG_GENERIC_MMC
78 #define CONFIG_BOUNCE_BUFFER
81 #define CONFIG_CMD_USB
82 #define CONFIG_USB_STORAGE
83 #define CONFIG_USB_EHCI
84 #define CONFIG_USB_EHCI_MX6
85 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
86 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
89 #define CONFIG_CMD_SATA
95 #ifdef CONFIG_CMD_SATA
96 #define CONFIG_DWC_AHSATA
97 #define CONFIG_SYS_SATA_MAX_DEVICE 1
98 #define CONFIG_DWC_AHSATA_PORT_ID 0
99 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
101 #define CONFIG_LIBATA
107 #include "imx6_spl.h"
108 #define CONFIG_SPL_SPI_SUPPORT
109 #define CONFIG_SPL_LIBCOMMON_SUPPORT
110 #define CONFIG_SPL_SPI_FLASH_SUPPORT
111 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
112 #define CONFIG_SPL_SPI_LOAD
115 #define CONFIG_CMD_PING
116 #define CONFIG_CMD_DHCP
117 #define CONFIG_CMD_MII
118 #define CONFIG_CMD_NET
119 #define CONFIG_FEC_MXC
121 #define IMX_FEC_BASE ENET_BASE_ADDR
122 #define CONFIG_FEC_XCV_TYPE MII100
123 #define CONFIG_ETHPRIME "FEC"
124 #define CONFIG_FEC_MXC_PHYADDR 0x5
125 #define CONFIG_PHYLIB
126 #define CONFIG_PHY_SMSC
129 #define CONFIG_CMD_EEPROM
130 #define CONFIG_ENV_EEPROM_IS_ON_I2C
131 #define CONFIG_SYS_I2C_EEPROM_BUS 1
132 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
133 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
134 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
135 #define CONFIG_SYS_I2C_MULTI_EEPROMS
138 /* Miscellaneous commands */
139 #define CONFIG_CMD_BMODE
140 #define CONFIG_CMD_SETEXPR
142 /* allow to overwrite serial and ethaddr */
143 #define CONFIG_ENV_OVERWRITE
144 #define CONFIG_CONS_INDEX 1
145 #define CONFIG_BAUDRATE 115200
147 /* Command definition */
149 #define CONFIG_BOOTDELAY 2
151 #define CONFIG_PREBOOT ""
153 #define CONFIG_LOADADDR 0x12000000
154 #define CONFIG_SYS_TEXT_BASE 0x17800000
156 /* Miscellaneous configurable options */
157 #define CONFIG_SYS_LONGHELP
158 #define CONFIG_SYS_HUSH_PARSER
159 #define CONFIG_SYS_CBSIZE 1024
161 /* Print Buffer Size */
162 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
163 #define CONFIG_SYS_MAXARGS 16
164 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
166 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
168 #define CONFIG_CMDLINE_EDITING
170 /* Physical Memory Map */
171 #define CONFIG_NR_DRAM_BANKS 1
172 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
174 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
175 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
176 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
178 #define CONFIG_SYS_INIT_SP_OFFSET \
179 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
180 #define CONFIG_SYS_INIT_SP_ADDR \
181 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
183 /* Environment organization */
184 #define CONFIG_ENV_IS_IN_SPI_FLASH
185 #define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */
186 #define CONFIG_ENV_OFFSET (1024 * 1024)
187 /* M25P16 has an erase size of 64 KiB */
188 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
189 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
190 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
191 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
192 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
194 #define CONFIG_OF_LIBFDT
195 #define CONFIG_CMD_BOOTZ
197 #ifndef CONFIG_SYS_DCACHE_OFF
198 #define CONFIG_CMD_CACHE
201 #define CONFIG_CMD_BOOTZ
202 #define CONFIG_SUPPORT_RAW_INITRD
205 #define CONFIG_CMD_EXT3
206 #define CONFIG_CMD_EXT4
207 #define CONFIG_DOS_PARTITION
208 #define CONFIG_CMD_FS_GENERIC
209 #define CONFIG_LIB_UUID
210 #define CONFIG_CMD_FS_UUID
212 #define CONFIG_BOOTP_SERVERIP
213 #define CONFIG_BOOTP_BOOTFILE
215 #endif /* __CONFIG_H */