2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #define CONFIG_SILENT_CONSOLE
25 #define CONFIG_GPIOLIB 1
28 #define U_BOOT_SPRD_VER 1
29 /*#define SPRD_EVM_TAG_ON 1*/
30 #ifdef SPRD_EVM_TAG_ON
31 #define SPRD_EVM_ADDR_START 0x40006000
32 #define SPRD_EVM_TAG(_x) (*(((unsigned long *)SPRD_EVM_ADDR_START)+_x) = *(volatile unsigned long *)0x87003004)
37 #define CONFIG_YAFFS2 1
39 #define BOOT_PART "boot"
40 //#define BOOT_PART "kernel"
41 #define RECOVERY_PART "recovery"
43 * SPREADTRUM BIGPHONE board - SoC Configuration
45 #define CONFIG_ARM926EJS /* arm926ejs CPU core */
46 #define CONFIG_SC8800G
47 #define CONFIG_OPENPHONE
49 //add for lcd adapt temp overlord
50 #define CONFIG_LCD_OPENPHONE
54 #define PLATFORM_SC8800G
55 #define CHIP_VER_8800G2
56 #define CHIP_ENDIAN_LITTLE
57 #define SC8800S_LITTLE_ENDIAN FALSE
58 #define _LITTLE_ENDIAN 1
59 #define EXT_MEM_TYPE_DDR 1
62 #define BB_DRAM_TYPE_256MB_32BIT
63 #define CONFIG_MTD_NAND_SPRD 1
65 #define CONFIG_SYS_HZ 1000
66 #define CONFIG_SPRD_TIMER_CLK 1000 /*32768*/
68 //#define CONFIG_SYS_HUSH_PARSER
70 #ifdef CONFIG_SYS_HUSH_PARSER
71 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
74 /*#define CMDLINE_NEED_CONV */
76 #define WATCHDOG_LOAD_VALUE 0x4000
77 #define CONFIG_SYS_STACK_SIZE 0x400
79 //#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
81 /* NAND BOOT is the only boot method */
82 #define CONFIG_NAND_U_BOOT
83 #define DYNAMIC_CRC_TABLE
84 /* Start copying real U-boot from the second page */
85 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
86 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
87 #ifdef CONFIG_NAND_SPL
88 /* Load U-Boot to this address */
89 #define CONFIG_SYS_NAND_U_BOOT_DST 0x00f00000
90 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
92 #define CONFIG_SYS_SDRAM_BASE 0x00000000
93 #define CONFIG_SYS_INIT_SP_ADDR \
94 (CONFIG_SYS_SDRAM_BASE + 0x4000)
96 #define CONFIG_SYS_NAND_SPARE_SIZE 64
97 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
98 #define CONFIG_SYS_NAND_PAGE_COUNT 64
99 #define CONFIG_SYS_NAND_SIZE (128 * 1024 * 1024)
100 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
103 #define CONFIG_SYS_SDRAM_BASE 0x00000000
104 #define CONFIG_SYS_INIT_SP_ADDR \
105 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
107 #define CONFIG_SKIP_LOWLEVEL_INIT
110 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
111 /* Size of the block protected by one OOB (Spare Area in Samsung terminology) */
112 #define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE
113 /* Number of ECC bytes per OOB - S3C6400 calculates 4 bytes ECC in 1-bit mode */
114 //#define CONFIG_SYS_NAND_ECCBYTES 4
115 #define CONFIG_SYS_NAND_ECCBYTES 16
116 /* Number of ECC-blocks per NAND page */
117 #define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
118 /* Size of a single OOB region */
119 #define CONFIG_SYS_NAND_OOBSIZE 64
120 /* Number of ECC bytes per page */
121 #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
122 /* ECC byte positions */
123 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47, \
124 48, 49, 50, 51, 52, 53, 54, 55, \
125 56, 57, 58, 59, 60, 61, 62, 63}
127 #define CONFIG_HW_WATCHDOG
129 #define CONFIG_DISPLAY_CPUINFO
131 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
132 #define CONFIG_SETUP_MEMORY_TAGS 1
133 #define CONFIG_INITRD_TAG 1
139 #define CONFIG_SYS_MALLOC_LEN (2 << 20) /* 1 MiB */
141 * Board has 2 32MB banks of DRAM but there is a bug when using
142 * both so only the first is configured
144 #define CONFIG_NR_DRAM_BANKS 1
146 #define PHYS_SDRAM_1 0x00000000
147 #define PHYS_SDRAM_1_SIZE 0x10000000
148 #if (CONFIG_NR_DRAM_BANKS == 2)
149 #define PHYS_SDRAM_2 0x90000000
150 #define PHYS_SDRAM_2_SIZE 0x02000000
153 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
154 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1+0x0800000)
155 #define CONFIG_STACKSIZE (256 * 1024) /* regular stack */
160 #define CONFIG_SPRD_UART 1
161 #define CONFIG_SYS_SC8800X_UART1 1
162 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */
163 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
164 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
167 * Flash & Environment
169 /* No NOR flash present */
170 #define CONFIG_SYS_MONITOR_LEN ((CONFIG_SYS_NAND_U_BOOT_OFFS)+(CONFIG_SYS_NAND_U_BOOT_SIZE))
171 #define CONFIG_SYS_NO_FLASH 1
172 #define CONFIG_ENV_IS_NOWHERE
173 #define CONFIG_ENV_SIZE (128 * 1024)
175 #define CONFIG_ENV_IS_IN_NAND
176 #define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN
177 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
181 #define CONFIG_NAND_SPRD
182 #define CONFIG_SPRD_NAND_REGS_BASE (0x60000000)
183 #define CONFIG_SYS_MAX_NAND_DEVICE 1
184 #define CONFIG_SYS_NAND_BASE (0x60000000)
185 //#define CONFIG_JFFS2_NAND
186 #define CONFIG_SPRD_NAND_HWECC
187 #define CONFIG_SYS_NAND_LARGEPAGE
189 #define CONFIG_SYS_64BIT_VSPRINTF
191 #define CONFIG_CMD_MTDPARTS
192 #define CONFIG_MTD_PARTITIONS
193 #define CONFIG_MTD_DEVICE
194 #define CONFIG_CMD_UBI
195 #define CONFIG_RBTREE
197 /* U-Boot general configuration */
198 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
199 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
200 /* Print buffer sz */
201 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
202 sizeof(CONFIG_SYS_PROMPT) + 16)
203 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
204 /* Boot Argument Buffer Size */
205 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
206 #define CONFIG_CMDLINE_EDITING
207 #define CONFIG_SYS_LONGHELP
209 /* support OS choose */
210 #undef CONFIG_BOOTM_NETBSD
211 #undef CONFIG_BOOTM_RTEMS
213 /* U-Boot commands */
214 #include <config_cmd_default.h>
215 #define CONFIG_CMD_NAND
216 #undef CONFIG_CMD_FPGA
217 #undef CONFIG_CMD_LOADS
218 #undef CONFIG_CMD_NET
219 #undef CONFIG_CMD_NFS
220 #undef CONFIG_CMD_SETGETDCR
222 #define CONFIG_ENV_OVERWRITE
224 #ifdef SPRD_EVM_TAG_ON
225 #define CONFIG_BOOTDELAY 0
227 #define CONFIG_BOOTDELAY 0
228 #define CONFIG_ZERO_BOOTDELAY_CHECK
231 #define CONFIG_LOADADDR 0x01000000 /* loadaddr env var */
232 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
234 #define xstr(s) str(s)
237 #define MTDIDS_DEFAULT "nand0=sprd-nand"
238 #ifdef CONFIG_G2PHONE
239 #define MTDPARTS_DEFAULT "mtdparts=sprd-nand:384k@256k(boot),256k(params),6m(kernel),6m(ramdisk),6m(recovery),70m(system),30m(userdata),7m(cache)"
240 #define CONFIG_BOOTARGS "mem=64M console=ttyS1,115200n8 init=/init "MTDPARTS_DEFAULT
241 #elif defined CONFIG_OPENPHONE
242 #define MTDPARTS_DEFAULT "mtdparts=sprd-nand:256k(spl),512k(2ndbl),128k(params),512k(vmjaluna),10m(modem),3840k(fixnv),3840k(backupfixnv),5120k(dsp),3840k(runtimenv),10m(boot),10m(recovery),150m(system),280m(userdata),20m(cache),256k(misc),1m(boot_logo),1m(fastboot_logo),2m(productinfo),512k(kpanic)"
243 #define CONFIG_BOOTARGS "mem=240M console=ttyS1,115200n8 init=/init " MTDPARTS_DEFAULT
245 /* used blocks are 4019 and remaining block are 4096 - 4019 */
247 #define CONFIG_BOOTCOMMAND "cboot normal"
248 #define CONFIG_EXTRA_ENV_SETTINGS ""
250 #ifdef CONFIG_CMD_NET
251 #define CONFIG_IPADDR 192.168.10.2
252 #define CONFIG_SERVERIP 192.168.10.5
253 #define CONFIG_NETMASK 255.255.255.0
254 #define CONFIG_USBNET_DEVADDR 26:03:ee:00:87:9f
255 #define CONFIG_USBNET_HOSTADDR 9a:04:c7:d6:30:d0
258 #define CONFIG_NET_MULTI
259 #define CONFIG_CMD_DNS
260 #define CONFIG_CMD_NFS
261 #define CONFIG_CMD_RARP
262 #define CONFIG_CMD_PING
263 /*#define CONFIG_CMD_SNTP */
266 #define CONFIG_USB_GADGET_SC8800G
267 #define CONFIG_USB_DWC
268 #define CONFIG_USB_GADGET_DUALSPEED
269 //#define CONFIG_USB_ETHER
270 #define CONFIG_CMD_FASTBOOT
271 #define SCRATCH_ADDR 0x1000000
272 #define FB_DOWNLOAD_BUF_SIZE (150*1024*1024)
274 #define CONFIG_MODEM_CALIBERATE
276 #define CONFIG_UPDATE_TFTP
278 #define CONFIG_OF_LIBFDT
279 #define CONFIG_SYS_MAX_FLASH_BANKS 1
280 #define CONFIG_SYS_MAX_FLASH_SECT 128
284 #define CONFIG_SPLASH_SCREEN
285 #define LCD_BPP LCD_COLOR16
286 //#define CONFIG_LCD_INFO
287 //#define LCD_TEST_PATTERN
288 //#define CONFIG_LCD_LOGO
289 #define CONFIG_SYS_WHITE_ON_BLACK
290 #ifdef LCD_TEST_PATTERN
291 #define CONSOLE_COLOR_RED 0xf800
292 #define CONSOLE_COLOR_GREEN 0x07e0
293 #define CONSOLE_COLOR_YELLOW 0x07e0
294 #define CONSOLE_COLOR_BLUE 0x001f
295 #define CONSOLE_COLOR_MAGENTA 0x001f
296 #define CONSOLE_COLOR_CYAN 0x001f
300 #define CALIBRATE_ENUM_MS 15000
301 #define CALIBRATE_IO_MS 10000
303 #define LOW_BAT_VOL 3500 /*phone battery voltage low than this value will not boot up*/
304 #define LOW_BAT_VOL_CHG 3300 //3.3V charger connect
306 #define PWR_KEY_DETECT_CNT 12 /*this should match the count of boot_pwr_check() function */
307 #define ALARM_LEAD_SET_MS 0 /* time set for alarm boot in advancd */
309 #endif /* __CONFIG_H */