2 * (C) Copyright 2003-2004
3 * MPC Data Limited (http://www.mpc-data.co.uk)
4 * Dave Peverley <dpeverley at mpc-data.co.uk>
6 * Configuation settings for the TI OMAP Perseus 2 board.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 /* allow to overwrite serial and ethaddr */
31 #define CONFIG_ENV_OVERWRITE
34 * High Level Configuration Options
38 #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
39 #define CONFIG_OMAP 1 /* in a TI OMAP core */
40 #define CONFIG_OMAP730 1 /* which is in a 730 */
41 #define CONFIG_P2_OMAP730 1 /* a Perseus 2 Board */
45 * The OMAP730 Perseus 2 has 13MHz input clock
48 #define CONFIG_SYS_CLK_FREQ 13000000
50 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
52 #define CONFIG_MISC_INIT_R
54 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
55 #define CONFIG_SETUP_MEMORY_TAGS 1
58 * Size of malloc() pool
61 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
67 #define CONFIG_NET_MULTI
68 #define CONFIG_LAN91C96
69 #define CONFIG_LAN91C96_BASE 0x04000300
70 #define CONFIG_LAN91C96_EXT_PHY
73 * NS16550 Configuration
76 #define CONFIG_SYS_NS16550
77 #define CONFIG_SYS_NS16550_SERIAL
78 #define CONFIG_SYS_NS16550_REG_SIZE (1)
79 #define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
80 #define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart
84 * select serial console configuration
87 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP730 Perseus 2 */
89 #define CONFIG_CONS_INDEX 1
90 #define CONFIG_BAUDRATE 115200
91 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
95 * Command line configuration.
97 #include <config_cmd_default.h>
99 #define CONFIG_CMD_DHCP
105 #define CONFIG_BOOTP_SUBNETMASK
106 #define CONFIG_BOOTP_GATEWAY
107 #define CONFIG_BOOTP_HOSTNAME
108 #define CONFIG_BOOTP_BOOTPATH
111 #include <configs/omap730.h>
112 #include <configs/h2_p2_dbg_board.h>
114 #define CONFIG_BOOTDELAY 3
115 #define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd root=/dev/nfs rw ip=bootp"
117 #define CONFIG_LOADADDR 0x10000000
119 #define CONFIG_ETHADDR
120 #define CONFIG_NETMASK 255.255.255.0
121 #define CONFIG_IPADDR 192.168.0.23
122 #define CONFIG_SERVERIP 192.150.0.100
123 #define CONFIG_BOOTFILE "uImage" /* File to load */
125 #if defined(CONFIG_CMD_KGDB)
126 #define CONFIG_KGDB_BAUDRATE 115200 /* Speed to run kgdb serial port */
127 #define CONFIG_KGDB_SER_INDEX 1 /* Which serial port to use */
131 * Miscellaneous configurable options
134 #define CONFIG_SYS_LONGHELP /* undef to save memory */
135 #define CONFIG_SYS_PROMPT "OMAP730 P2 # " /* Monitor Command Prompt */
136 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
137 /* Print Buffer Size */
138 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
139 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
140 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
142 #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
143 #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
145 #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
147 /* The OMAP730 has 3 general purpose MPU timers, they can be driven by
148 * the RefClk (12Mhz) or by DPLL1. This time is further subdivided by a
151 #define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
152 #define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
153 #define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
155 /*-----------------------------------------------------------------------
158 * The stack sizes are set up in start.S using the settings below
161 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
162 #ifdef CONFIG_USE_IRQ
163 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
164 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
167 /*-----------------------------------------------------------------------
168 * Physical Memory Map
171 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
172 #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
173 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
175 #if defined(CONFIG_CS0_BOOT)
176 #define PHYS_FLASH_1 0x0C000000
177 #elif defined(CONFIG_CS3_BOOT)
178 #define PHYS_FLASH_1 0x00000000
180 #error Unknown Boot Chip-Select number
183 #define PHYS_SRAM 0x20000000
185 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
187 /*-----------------------------------------------------------------------
188 * FLASH and environment organization
191 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
192 #define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
193 #define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
194 /* addr of environment */
195 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000)
197 /* timeout values are in ticks */
198 #define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
199 #define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
201 #define CONFIG_ENV_IS_IN_FLASH 1
202 #define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
203 #define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */
205 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
206 #define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
208 #endif /* ! __CONFIG_H */